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Novel In-Pixel-in-Memory (P2M) Paradigm for Edge Intelligence (USC)


A new technical paper titled "A processing-in-pixel-in-memory paradigm for resource-constrained TinyML applications" was published by researchers at University of Southern California (USC). According to the paper, "we propose a novel Processing-in-Pixel-in-memory (P2M) paradigm, that customizes the pixel array by adding support for analog multi-channel, multi-bit convolution, batch normaliza... » read more

MIT: Stackable AI Chip With Lego-style Design


New technical paper titled "Reconfigurable heterogeneous integration using stackable chips with embedded artificial intelligence" from researchers at MIT, along with Harvard University, Tsinghua University, Zhejiang University, and others. Partial Abstract: "Here we report stackable hetero-integrated chips that use optoelectronic device arrays for chip-to-chip communication and neuromorphic... » read more

Audio, Visual Advances Intensify IC Design Tradeoffs


A spike in the number of audio and visual sensors is greatly increasing design complexity in chips and systems, forcing engineers to make tradeoffs that can affect performance, power, and cost. Collectively, these sensors generate so much data that designers must consider where to process different data, how to prioritize it, and how to optimize it for specific applications. The tradeoffs in... » read more

Detecting Spatial Blotches In Image Sensor Devices


One of the most common defects in image sensor devices is spatial blotches. The appearance of blotches in image sensors is a regular occurrence and may be generated by internal moving parts or may be moved by air currents within the camera. Composed of two main statistical methods, the first module employs an inferential method, applying a spatial segmentation of the current frame to obtain ... » read more

Graphene and two-dimensional materials for silicon technology


Abstract: "The development of silicon semiconductor technology has produced breakthroughs in electronics—from the microprocessor in the late 1960s to early 1970s, to automation, computers and smartphones—by downscaling the physical size of devices and wires to the nanometre regime. Now, graphene and related two-dimensional (2D) materials offer prospects of unprecedented advances in device ... » read more

Reducing Data At The Source


Jens Döge, group manager for image acquisition and processing in Fraunhofer IIS’ Engineering of Adaptive Systems Division, talks about how to slash the amount of data that needs to be sent to the cloud or edge for processing by focusing only on the regions of interest in an image, and how that reduces the cost of moving that data. » read more

Advances In 3D CMOS Image Sensors Optical Modeling: Combining Realistic Morphologies With FDTD


This paper describes an innovative methodology to investigate the relationship between device morphology and the optical performance of CMOS image sensors. By coupling a FDTD-based 3D Maxwell solver with silicon-accurate process modeling software, we have been able to analyze the sensitivity of image sensor quantum efficiency with respect to statistical variations in nm-scale device topology. A... » read more

Racing To The Edge


The race is on to win a piece of the edge, despite the fact that there is no consistent definition of where the edge begins and ends or how the various pieces will be integrated or ultimately tested. The edge concept originated with the Internet of Things, where the initial idea was that tens of billions of dumb sensors would communicate through gateways to the cloud. That idea persisted unt... » read more

The Week In Review: Design


M&A Design services firm Synapse Design acquired the assets of ACEIC Design Technologies, including the engineering team and verification IP. ACEIC, which was based in Bangalore, primarily focused on verification services for wireless 802.11ac MAC IP. This is only the latest expansion move from Synapse. Earlier this year, the company acquired the services companies Tech Vulcan in San Diego... » read more

Analog FastSpice Platform Full-Spectrum Sampled Periodic Noise Analysis


Many high-performance analog/mixed-signal ICs include track-and-hold circuits to sample analog signals at one or more discrete timepoints per period. Although track-and-hold circuits are periodic, traditional periodic noise (pnoise) analysis does not apply because it measures the device noise impact integrated over an entire period rather than at instantaneous time points within the target peri... » read more

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