Re-Engineering The FinFET


The semiconductor industry is still in the early stages of the [getkc id="185" kc_name="finFET"] era, but the [getkc id="26" kc_name="transistor"] technology already is undergoing a dramatic change. The fins themselves are getting a makeover. In the first-generation finFETs, the fins were relatively short and tapered. In the next wave, the fins are expected to get taller, thinner and more re... » read more

Manufacturing Bits: Oct. 7


Europe’s TFET project A new European project has revealed more details about its plans to develop a next-generation chip technology called tunnel field-effect transistors (TFETs). EPFL is coordinating this new European research project, dubbed E2SWITCH. The project also includes IBM, Forschungszentrum Jülich, the University of Lund, ETHZ, Imec, CCS, SCIPROM and IUNET. The project has be... » read more

What Happened To Next-Gen Lithography?


Chipmakers continue to march down the process technology curve. Using today’s optical lithography and multiple patterning, the semiconductor industry is scaling its leading-edge devices far beyond what was once considered possible. The question is how far can the industry extend 193nm immersion [getkc id="80" comment="lithography"] and multiple patterning before these technologies become t... » read more

Ion Implanter Market Heats Up


The ion implanter market has been a stable, if not a sleepy, business. The last big event took place in 2011, when Applied Materials re-entered the ion implanter market by acquiring Varian, the world’s leading supplier of these tools. The acquisition gave Applied Materials a commanding 80% share of the implanter business, with the other players fighting for the crumbs. But after year... » read more

Plotting IBM Micro’s Future


It’s been a wild ride for IBM’s Microelectronics Group. Neither IBM, nor the other parties involved, have made any public comments about the recent events concerning IBM Micro. Much of the drama has played out in the media. Based on those reports, here’s a rough outline of the events. Not long ago, IBM put its loss-ridden chip unit on the block to shore up the company’s bottom lin... » read more

EUV Is Key To 450mm Wafers


Whether the wafers in question are 200 mm in diameter, or 300 mm, or potentially 450 mm, larger wafer sizes have always been justified by manufacturing economics. If the cost to process a wafer stays the same, but the wafer contains more devices, then the cost per device goes down. For processes that apply to the entire wafer at once — etch, deposition, cleaning, and so forth — the equation... » read more

Next-Generation Sustainability Gets More Challenging


The semiconductor industry has made major progress on reducing energy usage and water consumption, and effectively abating its emissions, as companies made sustainability a core requirement in their design of new processes and tools. But it’s about to get considerably harder. That means more opportunities to add value with innovative technologies, and also more need for collaboration. Next... » read more

What Is A Technology Node, Anyway?


The idea of clearly defined “technology nodes” has been more theoretical than practical for quite some time now. Electrostatic and power consumption considerations have long made it difficult to scale transistor dimensions at the same rate as memory density. Meanwhile, lithography has become more and more challenging, particularly for the arbitrary patterns commonly seen in logic design. ... » read more

Will 7nm And 5nm Really Happen?


Today’s silicon-based finFETs could run out of steam at 10nm. If or when chipmakers move beyond 10nm, IC vendors will require a new transistor architecture. III-V finFETs, gate-all-around FETs, quantum well finFETs, SOI finFETs and vertical nanowires are just a few of the future transistor candidates at 7nm and 5nm. Technically, it’s possible to manufacture the transistor portions of the... » read more

Stacked Die Are Coming Soon. Really


Since the beginning of the decade there have been many predictions that stacked die were just over the hill, but the time it has taken to climb that hill has been longer than most people would have anticipated. In fact, TSMC has been fully capable of building stacked die since last year, with risk production expected to be completed by year, according to Gartner. But something very fundament... » read more

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