Enhancing Silicon Reliability With In-System Test And SLM Data


Innovation in semiconductor development and manufacturing shows no signs of slowing down. Ever-larger chips at ever-smaller geometries create new challenges all the time. At the same time, competitive pressures are shrinking time to market (TTM) and putting enormous pressure on project teams. Furthermore, the wide use of electronics in safety-critical applications demands better reliability, av... » read more

In-System Test For AI Data Centers


Testing inside the fab or packaging house can determine whether a chip or package meets all the functional requirements at time zero, but how that chip behaves in the field during its lifetime and under different workloads and environmental conditions may be very different. This is particularly true in AI data centers, where utilization of one or more dies may be significantly higher than in pr... » read more

In-System/In-Field Testing Using High-Quality Deterministic Test Patterns


The amount of electronic content in passenger cars is growing rapidly, primarily due to the integration of advanced safety features. The shift towards fully autonomous vehicles, which must comply with stringent safety standards, will further increase the number of electronic components required. Testing efforts must be of exceptional quality. The target test time is often limited to less than 1... » read more

Design For Test Data


As design pushes deeper into data-driven architectures, so does test. Geir Eide, director for product management of DFT and Tessent Silicon Lifecycle Solutions at Siemens Digital Industries Software, talks with Semiconductor Engineering about a subtle but significant shift for designing testability into chips so that test data can be used at multiple stages during a device’s lifetime. » read more

Improving In-System Test With Tessent VersaPoint Test Point Technology


This paper describes a new versatile test point technology called VersaPoint, which has been developed specifically to work with designs implementing mixed EDT/LBIST methodologies to reduce EDT pattern counts and improve Logic BIST (LBIST) test coverage. VersaPoint test points can reduce compressed pattern counts 2X to 4X beyond compression alone and improve LBIST test coverage beyond what is p... » read more

Planning Ahead For In-System Test Of Automotive ICs


Automobiles are increasingly more like electronic devices than mechanical platforms. As a share of the total cost of a car, electronics components have grown from about 5% in 1970 to 35% in 2010. Electronics are projected to account for 50% by 2030 (Deloitte, 2019). Some of the electronics are for passive operations, like display or In-Vehicle Infotainment (IVI) systems, but a growing proportio... » read more

A Simple Way To Improve Automotive In-System Test


The remarkable growth in automotive IC design has prompted a focus on ISO26262 functional safety compliance, which includes both high-quality manufacturing test and a minimum stuck-at test coverage of 90% for in-system test. Designers must also control IC test data volumes, test application times, and test costs. A new test point technology that improves in-system test coverage and reduces patt... » read more