tag: inferencing

Compiling And Optimizing Neural Nets
By Bryon Moyer - 10 Sep, 2020 - Comments: 0

Edge inference engines often run a slimmed-down real-time engine that interprets a neural-network model, invoking kernels as it goes. But higher performance can be achieved by pre-compiling the model and running it directly, with no interpretation — as long as the use case permits it. At compile time, optimizations are possible that wouldn’t be available if interpreting. By quantizing au... » read more

From Data Center To End Device: AI/ML Inferencing With GDDR6
By Rambus - 09 Sep, 2020 - Comments: 0

Created to support 3D gaming on consoles and PCs, GDDR packs performance that makes it an ideal solution for AI/ML inferencing. As inferencing migrates from the heart of the data center to the network edge, and ultimately to a broad range of AI-powered IoT devices, GDDR memory’s combination of high bandwidth, low latency, power efficiency and suitability for high-volume applications will be i... » read more

eFPGAs Vs. FPGA Chiplets
By Ed Sperling - 22 Jul, 2020 - Comments: 0

Embedded FPGAs are a totally different concept from discrete FPGA chiplets, and that is reflected in size, cost, power and performance. Geoff Tate, CEO of Flex Logix, talks about which applications are best for each, how each maximizes power and performance, and why choices will vary greatly by application. Related eFPGA Knowledge Center FPGA Knowledge Center Increasing EFPGA Densit... » read more

The Murky World Of AI Benchmarks
By Ann Mutschler - 30 Apr, 2020 - Comments: 0

AI startup companies have been emerging at breakneck speed for the past few years, all the while touting TOPS benchmark data. But what does it really mean and does a TOPS number apply across every application? Answer: It depends on a variety of factors. Historically, every class of design has used some kind of standard benchmark for both product development and positioning. For example, SPEC... » read more

Re-Imagining The GPU
By Susan Rambo And Ed Sperling - 23 Apr, 2020 - Comments: 0

John Rayfield, CTO at Imagination Technologies, sat down with Semiconductor Engineering to talk about RISC-V, AI, and computing architectures. What follows are excerpts of that conversation. SE: What your plans are for RISC-V? Rayfield: We're actively finalizing the integration of RISC-V cores into future-generation GPUs. That work has been going on for several months. Moving forward, we'... » read more

Stream Vs. Pool Data Processing
By Ed Sperling - 08 Apr, 2020 - Comments: 0

Geoff Tate, CEO of Flex Logix, looks at the very different data processing requirements at the edge and in the data center, and what really drives efficiency and speed in applications such as automotive. » read more

More Multiply-Accumulate Operations Everywhere
By Ed Sperling - 02 Apr, 2020 - Comments: 1

Geoff Tate, CEO of Flex Logix, sat down with Semiconductor Engineering to talk about how to build programmable edge inferencing chips, embedded FPGAs, where the markets are developing for both, and how the picture will change over the next few years. SE: What do you have to think about when you're designing a programmable inferencing chip? Tate: With a traditional FPGA architecture you ha... » read more

How Much Power Will AI Chips Use?
By Ed Sperling - 12 Mar, 2020 - Comments: 1

AI and machine learning have voracious appetites when it comes to power. On the training side, they will fully utilize every available processing element in a highly parallelized array of processors and accelerators. And on the inferencing side they, will continue to optimize algorithms to maximize performance for whatever task a system is designed to do. But as with cars, mileage varies gre... » read more

Power Challenges In ML Processors
By Brian Bailey - 12 Mar, 2020 - Comments: 0

The design of artificial intelligence (AI) chips or machine learning (ML) systems requires that designers and architects use every trick in the book and then learn some new ones if they are to be successful. Call it style, call it architecture, there are some designs that are just better than others. When it comes to power, there are plenty of ways that small changes can make large differences.... » read more

Thinking About AI Power In Parallel
By Ed Sperling - 13 Feb, 2020 - Comments: 0

Most AI chips being developed today run highly parallel series of multiply/accumulate (MAC) operations. More processors and accelerators equate to better performance. This is why it's not uncommon to see chipmakers stitching together multiple die that are larger than a single reticle. It's also one of the reasons so much attention is being paid to moving to the next process node. It's not ne... » read more

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