Week In Review: Auto, Security, Pervasive Computing


Pervasive computing — IoT, edge, cloud, data center, and back The IoT designer Deed designed a screenless health monitor, worn on the wrist, that uses IoT (Internet of Things) building blocks from Infineon Technologies. The Get bracelet interprets hand gestures for making payments, picking up phone calls, turning up or down audio, while it also takes health data and biometrics. The system us... » read more

Lower Power Chips: What To Watch Out For


Low-power design in advanced nodes and advanced packaging is becoming a multi-faceted, multi-disciplinary challenge, where a long list of issues need to be solved both individually and in the context of other issues. With each new leading-edge process node, and with increasingly dense packaging, the potential for problematic interactions is growing. That, in turn, can lead to poor yield, cos... » read more

Gate Drive Solutions For CoolGaN 600 V HEMTs


This paper explains the gate drive requirements for Infineon’s CoolGaN 600 V e-mode HEMTs. Various driving solutions are discussed, ranging from the standard RC-coupled driver to a new differential drive concept utilizing dedicated gate driver ICs. In half-bridge topologies, a hybrid configuration combining isolated and non-isolated drivers could be an exciting alternative. Practical applicat... » read more

Benefits Of SiC For String Inverters


SiC MOSFETs in solar and energy storage applications have clear benefits compared to silicon technologies, addressing the pressing need for energy and cost savings, particularly when bidirectional power conversion is required. Ease of installation is one of the key features of high-power solar string inverters. It is beneficial if only two workers are needed to carry and install the system.... » read more

Week In Review: Design, Low Power


Tools Imperas and Valtrix inked a multi-year distribution and support agreement that makes Imperas simulation technology and RISC-V reference models available pre-integrated within Valtrix STING for RISC-V processor verification. The combined solution covers the full RISC-V specification for user, privilege, and debug modes, including all ratified standard extensions, and the near ratified (st... » read more

IoT Security: Confusing And Fragmented


Security regulations for Internet-of-Things (IoT) devices are evolving around the world, but there is no consistent set of requirements that can be applied globally — and there may never be. What exists today is a patchwork of certification labs and logos. That makes it difficult for IoT-device designers to know where to get their security blessed. Unlike in data centers, where there is a ... » read more

The Matter Standard: Implementing Improved Security And Connectivity For The Smart Home


The smart home continues to evolve in available functions and complexity as several different connectivity protocols from numerous suppliers target a variety of products for use in smart homes. However, many consumers (71% according to incontrol) acknowledge fear of their personal information being stolen while using smart home products. At the same time, ease of use for user-installed products... » read more

Week In Review: Design, Low Power


Synopsys will acquire the semiconductor and flat panel display solutions of BISTel. The acquisition will add an integrated and comprehensive yield management and prediction solution for manufacturing quality and efficiency. BISTel provides engineering equipment systems and AI applications for smart manufacturing in a range of industries. "Combining Synopsys' and BISTel's expertise in fab soluti... » read more

Week In Review: Auto, Security, Pervasive Computing


Automotive Cadence will be capturing design insights from Presto Engineering, an ASIC designer working on high-performance system-in-package (SiP) development for the automotive and Industrial IoT markets. Presto, which also provides semiconductor services such as test and qualification, will use Cadence’s EDA and analysis tools (Allegro X Package Designer Plus, Clarity 3D Solver, Sigrity Xt... » read more

Blog Review: June 23


Synopsys' Manuel Mota shows how splitting SoCs into smaller dies for advanced packaging and using die-to-die interfaces to enable high bandwidth, low latency, and low power connectivity can benefit hyperscale data centers. Siemens EDA's Chris Spear explains the relationship between classes and objects in SystemVerilog with a handy visualization and notes the difference between SystemVerilog ... » read more

← Older posts Newer posts →