tag: Intel Corporation

Chip Industry Week In Review
By The SE Staff - 07 Mar, 2025 - Comments: 0

The Malaysian government signed a deal with Arm to kickstart a chip design ecosystem. Until now, Malaysia has focused on packaging and test. Adding chip design represents a major change in focus. The country will pay SoftBank $250 million over 10 years for Arm’s chip design IP and train 10,000 engineers. Global chip sales reached $56 billion in January, up nearly 18% from the same period i... » read more

Chip Industry Technical Paper Roundup: Mar. 4
By Linda Christensen - 04 Mar, 2025 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=410 /] Find more semiconductor research papers here. » read more

3D Stacked Device Architecture Enabled By BEOL-Compatible Transistors (Stanford et al.)
By Technical Paper Link - 26 Feb, 2025 - Comments: 0

A new technical paper titled "Omni 3D: BEOL-Compatible 3-D Logic With Omnipresent Power, Signal, and Clock" was published by researchers at Stanford University, Intel Corporation and Carnegie Mellon University. Abstract "This article presents Omni 3D—a 3-D-stacked device architecture that is naturally enabled by back-end-of-line (BEOL)-compatible transistors. Omni 3D interleaves metal lay... » read more

Mixed-Precision DL Inference, Co-Designed With HW Accelerator DPU (Intel)
By Technical Paper Link - 03 Feb, 2025 - Comments: 0

A new technical paper titled "StruM: Structured Mixed Precision for Efficient Deep Learning Hardware Codesign" was published by Intel. Abstract "In this paper, we propose StruM, a novel structured mixed-precision-based deep learning inference method, co-designed with its associated hardware accelerator (DPU), to address the escalating computational and memory demands of deep learning worklo... » read more

CXL’s Potential to Elevate The Capabilities of HPC and AI Applications (Micron, Intel)
By Technical Paper Link - 20 Dec, 2024 - Comments: 0

A new technical paper titled "Optimizing System Memory Bandwidth with Micron CXL Memory Expansion Modules on Intel Xeon 6 Processors" was published by researchers at Micron and Intel. Abstract "High-Performance Computing (HPC) and Artificial Intelligence (AI) workloads typically demand substantial memory bandwidth and, to a degree, memory capacity. CXL memory expansion modules, also known... » read more

Chip Industry Technical Paper Roundup: Oct. 22
By Linda Christensen - 22 Oct, 2024 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=371 /]   More Reading Chip Industry Week In Review AI CPU chiplet platform; Intel-AMD pact; GDDR7 DRAM; AI-RFIC funding; CHIPS Act awards; NoC tiling; thermal modeling on chiplets; $900M nuclear tech and more. Technical Paper Library home » read more

3D Device With BEOL-Compatible Channel And Physical Design for Efficient Double-Side Routing
By Technical Paper Link - 17 Oct, 2024 - Comments: 0

A new technical paper titled "Omni 3D: BEOL-Compatible 3D Logic with Omnipresent Power, Signal, and Clock" was published by researchers at Stanford University, Intel Corporation, and Carnegie Mellon University. Abstract "This paper presents Omni 3D - a 3D-stacked device architecture that is naturally enabled by back-end-of-line (BEOL)-compatible transistors. Omni 3D arbitrarily interleaves ... » read more

ECTC 2024 Session Readout: Advancement of Metrology
By Technical Paper Link - 04 Sep, 2024 - Comments: 0

A Electronic Components and Technology Conference (ECTC) session report titled "2024 ECTC Special Session Report: Advancing Metrology for Next-Generation Microelectronics" was published by NIST, Binghamton University, and TechSearch International. Abstract: "Metrology plays a pivotal role in semiconductor research, manufacturing, packaging and assembly. It is critical to the success of this... » read more

Intel and Cadence Collaboration on UCIe: Demonstration of Simulation Interoperability
By Cadence - 28 Aug, 2024 - Comments: 0

The Universal Chiplet Interconnect Express (UCIe) 1.0 specification was announced in early 2022. A new updated UCIe 1.1 specification was released on August 8, 2023. The standardized open chiplet standard allows for heterogeneous integration of die-to-die link interconnects within the same package. The UCIe standard allows for advanced package and standard package options to tradeoff cost, band... » read more

Chip Industry Technical Paper Roundup: July 30
By Linda Christensen - 30 Jul, 2024 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library, including a best paper award winner at ISCA. [table id=246 /] More ReadingTechnical Paper Library home » read more

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