tag: Intel Corporation

Doping Mechanism Of Pure Nitric Oxide In Tungsten Diselenide Transistors (Purdue, MIT, NYCU)
By Technical Paper Link - 22 May, 2025 - Comments: 0

A technical paper titled "Uncovering the doping mechanism of nitric oxide in high-performance P-type WSe2 transistors" was published by researchers at Purdue University, MIT and National Yang Ming Chiao Tung University (with support from Intel Corporation). "Atomically thin two-dimensional (2D) semiconductors are promising candidates for beyond-silicon electronic devices. However, an excessi... » read more

Chip Industry Week in Review
By The SE Staff - 16 May, 2025 - Comments: 0

Check out the Inside Chips podcast for our behind-the-scenes analysis. Newly proposed U.S. legislation called the Chip Security Act would use location verification tracking as a tool to help combat chip smuggling. This follows a report by the Economist that showed Taiwan exports of advanced chips to Malaysia in the first quarter has nearly reached 2024 totals, heightening concerns that China... » read more

Chip Industry Technical Paper Roundup: Apr. 29
By Linda Christensen - 29 Apr, 2025 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=424 /] Find more semiconductor research papers here. » read more

Controlled Shared Memory For Dynamically Controlling Data Communication Via Shared Memory Approaches (ASU, Intel)
By Technical Paper Link - 27 Apr, 2025 - Comments: 0

A new technical paper titled "Controlled Shared Memory (COSM) Isolation: Design and Testbed Evaluation" was published by researchers at Arizona State University and Intel Corporation. Abstract "Recent memory sharing approaches, e.g., based on the Compute Express Link (CXL) standard, allow the flexible high-speed sharing of data (i.e., data communication) among multiple hosts. In information... » read more

Chip Industry Week in Review
By The SE Staff - 25 Apr, 2025 - Comments: 0

To listen to the podcast version, click here. TSMC unveiled an unusually detailed roadmap at this week's North America Technology Symposium, including future architectures for 3D-ICs for high-performance computing and small, extremely low-power chips for AR/VR glasses, and two implementations of system-on-wafer. Fig. 1: TSMC's future packaging and stacking roadmap. Source: TSMC The ... » read more

Chip Industry Week In Review
By The SE Staff - 18 Apr, 2025 - Comments: 0

[Podcast version is here.] TSMC said it will produce 30% of its leading-edge chips in Arizona when all six of its fabs are operational, a total investment of $165 billion, Axios reported. In its latest SEC filing, the foundry said it continues to add capacity in Taiwan, Arizona, Japan, and Germany. The Trump administration launched a Section 232 investigation into semiconductors and relat... » read more

Chip Industry Week In Review
By The SE Staff - 04 Apr, 2025 - Comments: 0

Check out our new Inside Chips podcast. President Trump’s ‘Liberation Day’ tariffs were announced this week. The executive order stated that semiconductors and copper imports are not directly subject to the reciprocal tariff, although the exemption may be short-lived. Semiconductor equipment and tools were not mentioned, leaving the industry searching for clarification. Regardless, hig... » read more

Chip Industry Week In Review
By The SE Staff - 07 Mar, 2025 - Comments: 0

The Malaysian government signed a deal with Arm to kickstart a chip design ecosystem. Until now, Malaysia has focused on packaging and test. Adding chip design represents a major change in focus. The country will pay SoftBank $250 million over 10 years for Arm’s chip design IP and train 10,000 engineers. Global chip sales reached $56 billion in January, up nearly 18% from the same period i... » read more

Chip Industry Technical Paper Roundup: Mar. 4
By Linda Christensen - 04 Mar, 2025 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=410 /] Find more semiconductor research papers here. » read more

3D Stacked Device Architecture Enabled By BEOL-Compatible Transistors (Stanford et al.)
By Technical Paper Link - 26 Feb, 2025 - Comments: 0

A new technical paper titled "Omni 3D: BEOL-Compatible 3-D Logic With Omnipresent Power, Signal, and Clock" was published by researchers at Stanford University, Intel Corporation and Carnegie Mellon University. Abstract "This article presents Omni 3D—a 3-D-stacked device architecture that is naturally enabled by back-end-of-line (BEOL)-compatible transistors. Omni 3D interleaves metal lay... » read more

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