Startup Funding: November 2022


November was a month for mega-rounds, with ten companies receiving investments of at least $100 million. One of those is a startup providing connectivity solutions for data centers and enabling use of the memory pooling functionality in the latest update to the CXL standard. Two quantum computer startups were part of the $100M+ club this month — one using very cold atoms to take on not only q... » read more

HW-Enabled Security Techniques To Improve Platform Security And Data Protection For Cloud Data Centers And Edge Computing (NIST)


A technical paper titled "Hardware-Enabled Security: Enabling a Layered Approach to Platform Security for Cloud and Edge Computing Use Cases" was published by NIST, Intel, AMD, Arm, IBM, Cisco and Scarfone Cybersecurity. Abstract: "In today’s cloud data centers and edge computing, attack surfaces have shifted and, in some cases, significantly increased. At the same time, hacking has becom... » read more

Week In Review: Auto, Security, Pervasive Computing


Automotive, Mobility The U.S. space agency NASA entered a $57.2 million contract with ICON to develop technology to build roads on the moon. ICON, a Texas-based 3D printing construction company, has been working with NASA and the U.S. Air Force on construction technologies that can use local materials to build infrastructure on Mars. NASA is working on advanced 3D printing construction systems... » read more

Week In Review: Design, Low Power


Tools and IP Renesas released a family of configurable clock generators with an internal crystal oscillator for PCIe and networking applications in high-end computing, wired infrastructure and data center equipment. “Timing needs can vary greatly between different applications and equipment, and often change during a product design cycle,” said Zaher Baidas, Vice President of the Timing Pr... » read more

Blog Review: Nov. 23


Siemens EDA's Harry Foster looks at multiple data points to get a sense of effort spent in FPGA verification and increasing demand for FPGA verification engineers. Synopsys' Rimpy Chugh, Himanshu Kathuria, and Rohit Kumar Ohlayan argue that the quality of the design and testbench code is critical to a project’s success and that linting offers a comprehensive checking process for teams to s... » read more

Challenges And Solutions In Chip Design


Ansys is hosting IDEAS Digital Forum 2022, a no-cost virtual event that brings together industry executives and technical design experts to discuss the latest in EDA for Semiconductors, Electronics, and Photonics. The December 6th on-line event starts with Keynote addresses from Raja Koduri from Intel, Pankaj Kukkal from Qualcomm, and insights into the metaverse from DP Prakash with start-up... » read more

Week In Review: Semiconductor Manufacturing, Test


Chinese memory chip maker YMTC and dozens of other Chinese entities are "at risk" of being added to a trade blacklist as soon as Dec. 6, a U.S. Commerce Department official said in prepared remarks seen by Reuters. SMIC co-CEO Zhao Haijun said on an earnings call that recent export controls from the United States will have an "adverse impact" on the company's production. The U.K. has rule... » read more

Challenges In Backside Power Delivery


One of the key technologies to enable scaling below 3nm involves delivering of power on the backside of a chip. This novel approach enhances signal integrity and reduces routing congestion, but it also creates some new challenges for which today there are no simple solutions. Backside power delivery (BPD) eliminates the need to share interconnect resources between signal and power lines on t... » read more

Where All The Semiconductor Investments Are Going


Companies and countries are funneling huge sums of money into semiconductor manufacturing, materials, and research — at least a half-trillion dollars over the next decade, and maybe much more — to guarantee a steady supply of chips and know-how to support growth across a wide swath of increasingly data-centric industries. The build-out of a duplicate supply chain that can guarantee capac... » read more

Blog Review: Nov. 16


Siemens EDA's Jake Wiltgen explains the difference between transient and permanent faults when designing to the ISO 26262 standard, including where they come from and key ways to protect against them. Synopsys' Vikas Gautam points to how the economics of designing large SoCs is driving chiplet-based designs and the need for die-to-die standards such as UCIe, along with the key protocol verif... » read more

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