The Road To Autonomy

By Jeff Dorsch - 01 Feb, 2018 - Comments: 0

Visions of autonomous driving were everywhere at CES 2018 in Las Vegas and the North American International Auto Show in Detroit. Still, while there is progress in the technology, it will be years before the average motorist can get a fully autonomous vehicle. Advanced driver-assistance systems are gaining in complexity and scope, representing steps toward automated driving. At CES 2018, ... » read more

Manufacturing Bits: Jan. 30

By Mark LaPedus - 30 Jan, 2018 - Comments: 0

SRC’s new R&D centers The Semiconductor Research Corp. has launched a network of research centers within its recently-announced Joint University Microelectronics Program (JUMP). SRC officially launched the 5-year, $200 million program on Jan. 1. With various research centers, the mission of JUMP is to lay the groundwork that extends the viability of Moore’s Law through 2040. The idea is... » read more

The Week In Review: Design

By Jesse Allen - 26 Jan, 2018 - Comments: 0

Security Addressing the Meltdown and Spectre speculative execution vulnerabilities has not gone smoothly. Intel's firmware update caused unexpected behavior and a higher than expected number of reboots for its Haswell and Broadwell chips, leading the company to recommend users stop patching until an updated version of the patch is available. Microsoft's attempts to fix the issue left some W... » read more

Hedging The Chip Industry

By Ed Sperling - 25 Jan, 2018 - Comments: 1

The chip industry has changed significantly since the last big downturn. And while there is no indication a downturn is on the horizon, analysts are beginning to ask questions about what comes next. Inventory is building at systems companies because of weaknesses in some of the key markets such as mobile phones and tablet computers, and there is a growing risk of trade wars due to recently impo... » read more

Blog Review: Jan. 24

By Jesse Allen - 24 Jan, 2018 - Comments: 0

Mentor's Rich Edelman shares some tips for debugging complex UVM testbenches containing multiple agents, multiple checkers, and new HDL. Synopsys' Prasad Subudhi K. S. explains the PCIe PIPE 4.4.1 specification and the major improvements since 4.3, including better optimization in data flow and ultra-low power operations. Cadence's Paul McLellan steps back to before the Meltdown and Spect... » read more

5G Makes Its Public Debut At The Winter Games

By David Vye - 22 Jan, 2018 - Comments: 0

We have been spending considerable time and effort with our customers deep in the development of technology that will enable next-generation communications. Work on 5G technology has been underway for several years now-long before the general public will experience its amazing capabilities. So when will this next-generation technology be ready? You'll get a first look next month at the Winte... » read more

Nodes Vs. Nodelets

By Mark LaPedus - 22 Jan, 2018 - Comments: 0

Foundries are flooding the market with new nodes and different process options at existing nodes, spreading confusion and creating a variety of challenges for chipmakers. There are full-node processes, such as 10nm and 7nm, with 5nm and 3nm in R&D. But there also is an increasing number of half-nodes or "node-lets" being introduced, including 12nm, 11nm, 8nm, 6nm and 4nm. Node-lets ar... » read more

The Week In Review: Manufacturing

By Mark LaPedus - 19 Jan, 2018 - Comments: 0

Market research The SEMI Industry Strategy Symposium (ISS) opened with the theme “Smart, Intuitive & Connected: Semiconductor Devices Transforming the World.” Click here for some of the highlights at ISS. Here are more highlights from ISS. Korea is on a spending spree for fab tools. In total, Samsung and SK Hynix are forecast to invest over $20 billion in fab tools worldwide in 2018... » read more

The Future Of FinFETs

By Ed Sperling - 18 Jan, 2018 - Comments: 0

The number of questions about finFETs is increasing—particularly, how long can they continue to be used before some version of gate-all-around FET is required to replace them. This discussion is confusing in many respects. For one thing, a 7nm finFET for TSMC or Samsung is not the same as a 7nm finFET for Intel or GlobalFoundries. There are a bunch of other nodes being proposed, as well, i... » read more

What’s Next in 3D NAND?

By Mark LaPedus - 18 Jan, 2018 - Comments: 1

In 2018, the industry needs to keep a close eye on 3D NAND as the vendor base is in the midst of some major changes. The changes involve several partnerships, including the Toshiba/Western Digital and Intel/Micron duos. It also impacts the other 3D NAND players, namely Samsung and SK Hynix. But first, demand for NAND flash memory remains robust due to the onslaught of data in systems. ... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

Legacy Process Nodes Going Strong

The critical, and growing, significance of mature node chips and processes.

by Bryon Moyer

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?