tag: interconnects

ATE Market Changes With The Times
By Jeff Chappell - 15 Aug, 2013 - Comments: 0

By Jeff Chappell A declining PC market in recent years coupled with the continuing growth of mobile phones and tablets has meant changes throughout the semiconductor supply chain, and automated test equipment is no exception. For example, a decade ago memory test—namely DRAM—was a large market compared with that of nascent system-on-a-chip (SoC) testing. In fact, at the time some test e... » read more

Experts At The Table: Performance Analysis
By Ed Sperling - 02 Aug, 2013 - Comments: 0

By Ed Sperling Low-Power/High-Performance Engineering sat down with Ravi Kalyanaraman, senior verification manager for the digital entertainment business unit at Marvell; William Orme, strategic marketing manager for ARM’s System IP and Processor Division; Steve Brown, product marketing and business development director for the systems and software group at Cadence; Johannes Stahl director o... » read more

Manufacturing Bits: July 16
By Mark LaPedus - 16 Jul, 2013 - Comments: 0

Photon Chips Harvard University, the Massachusetts Institute of Technology (MIT) and the Vienna University of Technology have devised an all-optical transistor controlled by a single photon. The optical transistor could enable the development of photonic quantum gates and deterministic multi-photon entanglement. For years, researchers have been looking to develop an optical transistor, whe... » read more

Extending Copper Interconnect Beyond The 14nm Node
By Various Writers - 20 Jun, 2013 - Comments: 0

Fabricating interconnects is one of the most process-intensive and cost-sensitive parts of manufacturing. To find out more about what's changing in this area and why it's so important, click here. » read more

Executive Briefing: Wally Rhines
By Ed Sperling - 28 Mar, 2013 - Comments: 0

By Ed Sperling System-Level Design, as part of its ongoing executive briefing series, sat down with Wally Rhines, Mentor Graphics' chairman and CEO, to talk about future problems, opportunities, and the gray areas that could go either way. What follows are excerpts of that conversation. SLD: Is the amount of time spent on verification increasing? Rhines: It depends on how you define who s... » read more

Nanoscale Wiring
By Kathryn Ta - 21 Mar, 2013 - Comments: 0

By Kathryn Ta The TEM image (below) taken at Applied Materials’ Maydan Technology Center shows a series of 20nm-wide trenches in cross section. These tiny structures – about 1/5000th of the diameter of an average human hair – are similar to the interconnects used to wire the billions of transistors in next-generation microchips. You can see that each trench is partially filled with coppe... » read more

What Will Replace Dual Damascene?
By Mark LaPedus - 24 Jan, 2013 - Comments: 0

By Mark LaPedus In the mid-1990s, IBM announced the world’s first devices using a copper dual damascene process. At the time, the dual damascene manufacturing process was hailed as a major breakthrough. The new copper process enabled IC makers to scale the tiny interconnects in a device, as the previous material, aluminum, faced some major limitations. Dual damascene remains the workhorse... » read more

Interconnect Troubles
By Applied Materials Writers - 13 Dec, 2012 - Comments: 0

By Mehul Naik These days, transistor scaling is driving some of the most exciting innovations in device architecture and getting lots of attention as a result. What may be less obvious is the cascading effect transistor scaling is having on the interconnect. The biggest challenges result directly from pitch reduction required to support the increasing functionality. These include poor pattern ... » read more

Interconnect Performance In The Spotlight
By Applied Materials Writers - 04 Dec, 2012 - Comments: 0

By Richard Lewington Are you going to be in the San Francisco area on December 11th? We're hosting a forum to explore the path that interconnect technology must take to keep pace with transistor scaling and the transition to new 3D architectures. Transistors get all the attention these days as the savior of Moore's Law. But there's no point making transistors faster if the wires between ... » read more

The Threat Within
By Applied Materials Writers - 16 Aug, 2012 - Comments: 0

By Connie Duncan Given that today’s advanced chips can contain billions of transistors, 60 miles of copper wiring and 10 billion vertical connections between metal layers, the challenges and potential pitfalls this level of complexity presents are mind-boggling. One major problem on the horizon at 20nm and below is the threat of voids forming in the vertical interconnects commonly called via... » read more

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