3 Ways To Differentiate

By Ed Sperling - 13 Jan, 2013 - Comments: 0

Time-to-market pressures and complexity have put the squeeze on design teams. They have to bring incredibly complex SoCs to market on time, make sure they’re functionally correct and work within a tight power budget, and they have to come in on or under budget. Amazingly, they’re still able to accomplish this, thanks to some heroic efforts on the part of engineers and some incredible adv... » read more

New Apps For 3D Chips

By Ed Sperling - 15 Nov, 2012 - Comments: 0

By Mark LaPedus Semiconductor Manufacturing and; Design sat down to discuss the 3D device challenges and applications with Peter Ramm, head of the department for device and 3D integration at Fraunhofer EMFT Munich, one of Europe’s largest research organizations. SMD: Fraunhofer was a pioneer in 3D chip R&D, right? Ramm: We are the oldest microelectronics institute in Germany. We st... » read more

Where Does It Hurt?

By Ed Sperling - 27 Sep, 2012 - Comments: 0

By Ed Sperling The IC design industry is feeling a new kind of pain—this one driven by uncertainty over architectural shifts, new ecosystem interactions and new ways to account for costs. As mainstream ICs move from 50/45/40nm to around 32/28/22nm, there are only two choices for design teams—continue shrinking features or stack dies. In many cases, the ultimate solution may be a combina... » read more

New Processes Define New Power Plans

By Ed Sperling - 05 Apr, 2012 - Comments: 0

By Pallab Chatterjee FinFETs, stacked die, heterogeneous interposers, TSVs, 450mm wafers, new interconnects and everything with MEMs and sensors is what the last few weeks have brought. A number of major announcements, technology releases, conference updates have identified these technologies as the future of IC design. At ISQED, Robert Geer, chief academic officer at the College of Nanosca... » read more

Business First

By Ed Sperling - 19 Aug, 2011 - Comments: 0

The move to stacked die poses some interesting technology challenges and promises significant technology benefits, but the real driver is business—and for this market to work, it has to continue being about business. In the past it was technology first, business last. We are now at the stage where it is business first, technology last. Re-use of entire die as subystems, better use of desig... » read more

New Stacking Issues

By Norman Chang - 11 Aug, 2011 - Comments: 0

Reduced form factors, higher performance, and the demand for lower power necessitate the need for 3D-IC/silicon interposer designs with through-silicon vias (TSVs). That also creates major design challenges in three areas. The verification of power, signal, and reliability integrity—particularly with multi-stacked die on silicon interposer with TSVs—presents issues that can only be overcome... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer