Streamlining Complex Semiconductor Designs With IP-XACT-Based Structured Assembly

By Insaf Meliane - 29 Aug, 2024 - Comments: 0

Semiconductor design is rapidly evolving because technologies such as AI and machine learning (ML) applications push the boundaries of complexity and specialization. Modern chips require hundreds or thousands of IP blocks, leading to significant design challenges. Multi-die architectures, which distribute functional blocks across multiple dice, demand expert planning to ensure connectivity and ... » read more

Data Coherence Across Silos And Hierarchy

By Brian Bailey - 27 Jun, 2024 - Comments: 0

Shift left has become a rallying cry for the chip design industry, but unless coherent data can flow between the groups being impacted, the value may not be as great as expected. Shift left is a term that encompasses attempts to bring analysis and decision-making forward in the development process. The earlier an issue can be found, the less of a problem it ultimately becomes. But in many ca... » read more

Promises And Pitfalls Of SoC Restructuring

By Ed Sperling - 12 Jun, 2024 - Comments: 0

As chips become more complex and increasingly heterogeneous, it's becoming more difficult to keep track of different methodologies, tools, and blend data from different sources to create a chip. Tim Schneider, staff application engineer at Arteris, explains why IP-XACT has become so critical, why it took so long to gain a solid foothold in chip design, and how the new IP-XACT standard interface... » read more

Design Complexity In The Golden Age Of Semiconductors

By Frank Schirrmeister - 24 Aug, 2023 - Comments: 0

While writing last month's blog that used some of the trend charts we have seen, I noticed that a lot of the data ends in 2020 or earlier, but I was too close to the deadline to sit down and make orderly updates to some of the charts. Working day-to-day in the area of SoC integration and networks-on-chips (NoCs), the classic chart based on Karl Rupp's now 50 years of processor data that overlay... » read more

A Design Flow For Critical Embedded Systems

By Arteris - 23 Aug, 2023 - Comments: 0

Learn how IP encapsulation/packaging and interoperability using IP-XACT enabled automation in a complex verification & validation flow for aeronautical systems. Includes usage of these capabilities integrated using Arteris SoC integration technology: HW/SW codesign RTL, SystemC TLM and PSL Instruction Set Simulators Click here to read more. » read more

The Design Automation Conference Turns 60! What’s Hot? What’s Next?

By Frank Schirrmeister - 06 Jul, 2023 - Comments: 0

This coming week from July 9th to July 13th, experts from all over the world will descend on the Moscone Center in San Francisco to discuss aspects of what we call "Electronic Design Automation" (EDA) and typically associate with hardware development. There will be many celebratory elements this year, given the milestone of 60 years. Industry luminary Alberto Sangiovanni Vincentelli will give o... » read more

A New Breed Of EDA Required

By Brian Bailey - 23 Jun, 2022 - Comments: 1

While doing research for one of my stories this month, a couple of people basically said that applying methodologies of the past to the designs of today can be problematic because there are fundamental differences in the architectures and workloads. While I completely agree, I don't think these statements go far enough. Designs of today generally have one of everything — one CPU, one accel... » read more

Using IP-XACT To Solve Design And Verification Problems

By Anika Malhotra - 13 Oct, 2021 - Comments: 0

As today’s SoC designs grow more complex and time-to-market (TTM) pressures rise, designers are looking for techniques to build and update designs easily. Key elements for addressing these SoC challenges include the incorporation of more commercial IP components, internal design IP reuse, and extensive automation of design and verification activities. Enhanced interoperability and reusability... » read more

Steering The Semiconductor Industry

By Brian Bailey - 26 Aug, 2021 - Comments: 2

Progress in semiconductors has been one of the most successful engineering feats, and the industry has ridden an exponential curve longer than anything else in history. It is also a highly conservative industry that has pushed away many disruptive changes in favor of small incremental changes that minimize risk. There have been significant changes over the decades, and they often required a ... » read more

IP-XACT Is Back, For All The Right Reasons

By Vincent Thibaut - 01 Jul, 2021 - Comments: 0

The intent behind IP-XACT has always been to provide a bridge between system-on-chip (SoC) assembly and larger considerations. This standard has additionally been used to adapt to multi-sourced and constantly evolving intellectual property (IP) that design and product teams build, often in different companies. Moreover, it was used to interface with product development beyond the specialized ne... » read more

← Older posts

Knowledge Centers
Entities, people and technologies explored

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

Legacy Process Nodes Going Strong

The critical, and growing, significance of mature node chips and processes.

by Bryon Moyer

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: IP-XACT

Streamlining Complex Semiconductor Designs With IP-XACT-Based Structured Assembly

Data Coherence Across Silos And Hierarchy

Promises And Pitfalls Of SoC Restructuring

Design Complexity In The Golden Age Of Semiconductors

A Design Flow For Critical Embedded Systems

The Design Automation Conference Turns 60! What’s Hot? What’s Next?

A New Breed Of EDA Required

Using IP-XACT To Solve Design And Verification Problems

Steering The Semiconductor Industry

IP-XACT Is Back, For All The Right Reasons

Trending Articles

Hybrid Bonding Makes Strides Toward Manufacturability

Americas Chip Funding Energizes Industry

Advanced Packaging Driving New Collaboration Across Supply Chain

Chiplets Make Progress Using Interconnects As Glue

2D Semiconductors Make Progress, But So Does Silicon

Knowledge Centers
Entities, people and technologies explored