The Limits Of IP Reuse

By Ed Sperling - 07 Sep, 2017 - Comments: 0

The basic business proposition for third-party IP is that it's cheaper, faster, and less problematic to buy rather than build. But things haven't exactly worked out according to plan, either for companies that license IP or those that develop it. For [getkc id="43" kc_name="IP"] licensees, just keeping track of an endless series of updates is becoming unwieldy. Complex designs often include ... » read more

How To Build An IoT Chip

By Ed Sperling - 07 Sep, 2017 - Comments: 1

Semiconductor Engineering sat down to discuss IoT chip design issues with Jeff Miller, product marketing manager for electronic design systems in the Deep Submicron Division of [getentity id="22017" e_name="Mentor, a Siemens Business"]; Mike Eftimakis, IoT product manager in [getentity id="22186" comment="ARM"]'s Systems and Software Group; and John Tinson, vice president of sales at Sondrel Lt... » read more

Executive Insight: Lip-Bu Tan

By Ed Sperling - 06 Sep, 2017 - Comments: 2

Semiconductor Engineering sat down with Lip-Bu Tan, president and CEO of [getentity id="22032" e_name="Cadence"], to discuss disruptions and changes in the semiconductor industry, from machine learning and advance packaging to tools and business. What follows are excerpts of that conversation. SE: What do you see as the next big thing? Tan: Unlike mobility or cell phones, or PCs before th... » read more

One Belt, One Road

By Ed Sperling - 24 Aug, 2017 - Comments: 0

China's so-called One Belt, One Road policy on global trade could have significant repercussions on semiconductors and IP if it succeeds. It's hardly a slam-dunk, and China has been vying for a larger position in the semiconductor industry for some time. But this is a completely different strategy because China is not attempting to go it alone this time. China has been rather quietly build... » read more

Portable Stimulus Status Report

By Brian Bailey - 24 Aug, 2017 - Comments: 0

The first release of the Portable Stimulus (PS) standard is slated for early next year. If it lives up to its promise, it could be the first new language and abstraction for verification in two decades. [getentity id="22028" e_name="Accellera"] uncorked the PS Early Adopter release at the Design Automation Conference (DAC) in June. The standard has been more than two years in the making by t... » read more

Executive Insight: Aart de Geus

By Ed Sperling - 24 Aug, 2017 - Comments: 0

Aart de Geus, chairman and co-CEO of [getentity id="22035" e_name="Synopsys"], sat down with Semiconductor Engineering to discuss machine learning and big data, the race toward autonomous vehicles, systems vs. chips, software vs. hardware, and the future of EDA. What follows are excerpts of that conversation. SE: The whole tech world is buzzing over data and how it gets used in areas such as... » read more

When Is Verification Complete?

By Ann Mutschler - 24 Aug, 2017 - Comments: 0

Deciding when verification is done is becoming a much more difficult decision, prompting verification teams to increasingly rely on metrics rather than just the tests listed in the verification plan. This trend has been underway for the past couple of process nodes, but it takes time to spot trends and determine whether they are real or just aberrations. The Wilson Research Group conducts a ... » read more

IP Biz Changes As Markets Fragment

By Ed Sperling - 22 Aug, 2017 - Comments: 0

Semiconductor Engineering sat down to discuss IP protection, tracking and reuse with Srinath Anantharaman, CEO of [getentity id="22203" e_name="ClioSoft"]; Jeff Galloway, CTO of Silicon Creations; Marc Greenberg, group director of product marketing for [getentity id="22032" e_name="Cadence"]'s IP Group; and John Koeter, vice president of marketing for [getentity id="22035" e_name="Synopsys"]' S... » read more

IP Challenges Ahead

By Brian Bailey - 10 Aug, 2017 - Comments: 0

The revenue from semiconductor [getkc id="43" kc_name="IP"] has risen steadily to become the largest segment of the EDA industry. Industry forecasts expect it to keep growing at a CAGR of more than 10% for the next decade. Part one of this article examined the possibility those forecasts are wrong and that large semiconductor companies are likely to start bringing IP development back in hous... » read more

System Performance Analysis At ARM

By Arm - 09 Aug, 2017 - Comments: 0

Performance analysis is a vital task in modern SoC design. An under-designed SoC may run too slowly to keep up with the demands of the system. An over- designed SoC will consume too much power and require more expensive IP blocks. At ARM we want to help our partners build SoCs that deliver the best performance within their power and area budgets. The simple truth is that this is more difficu... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

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