The Limits Of IP Reuse

The old model of write once, integrate many times doesn’t always work. Here’s why.


The basic business proposition for third-party IP is that it’s cheaper, faster, and less problematic to buy rather than build. But things haven’t exactly worked out according to plan, either for companies that license IP or those that develop it.

For IP licensees, just keeping track of an endless series of updates is becoming unwieldy. Complex designs often include multiple builds of dozens of IP blocks, particularly at advanced process nodes.

And for IP developers, demand for more customized IP is transforming the business from “write-once, use everywhere,” to “write once, modify every time.” Even in cases where the IP is relatively fixed, such as processor cores, there are enough tweaks required to optimize systems that it’s no longer as simple as understanding the power and performance characteristics in a design.

The reasons are complicated on both sides of this equation. At advanced nodes, every new rev of a process technology requires changes to the IP. This makes designing at 10/7nm particularly difficult because the process and the IP are in almost constant flux. But even at older nodes, new processes to address new or existing markets have made it more difficult for IP vendors to stay current.

Add to that rampant consolidation across the semiconductor industry, derivative designs, subsystems that incorporate multiple vendors’ IP, and this becomes trickier for everyone.

“The biggest concern we see is how to manage IP within a company,” said Ranjit Adhikary, vice president of marketing at ClioSoft. “There are challenges with implementation, with using it for different applications, and with the entire process for collecting information. In the past, if you had to find information about IP, you would talk to a lot of people and then figure out which IP is best for you and that was basically it. But it’s become much more complicated. Now you want to know whether it’s silicon-proven. Is it even available for a particular process? How many people are using it? How many revs have there been? Are there open issues?”

There are so many variables and variations and possible interactions that just keeping track of all of this has become incredibly difficult.

“IP reuse plays well as a buzz word,” said Mike Gianfagna, vice president of marketing at eSilicon. “But the reality is that any time you deal with analog/mixed signal and high-performance chips, some tweaking is required. The blocks are bigger. What used to be a whole chip is now one block, and now there are 30 or 50 of those in one chip.”

And that creates its own set of issues, because everything is now connected. So fiddling with one IP block can cause problems in other parts of a design, and simply re-using it doesn’t necessarily work.

“What happens far too often is that an IP block is designed for use in a single chip, particularly if it’s internally developed IP,” said Bill Neifert, senior director of market development at ARM. “There is a certain rigor required for deploying and re-using IP. Sometimes it costs more to re-use that IP than if the IP was designed for multiple applications.”

Changing business strategies

In the backdrop are some major shifts in the semiconductor business. Industry consolidation and the flattening of the mobility market have changed the IP market in some fundamental ways.

“If you look back over the past decade or more, the trend among OEMs was to shed ASIC teams and to buy commodity IP and chips, but that made it a lot harder for these companies to differentiate themselves,” said Frank Ferro, senior director of product management at Rambus. “Now companies are hiring back ASIC teams and doing a mixed model. They do IP development where it makes sense and add customization. But even with standard IP, they add a little differentiation to make it a little better.”

Ferro said the goal is still to build IP and license it to at least 10 customers. “We’ve been in the custom business because of the nature of hard IP, which means we work with the foundries to develop that IP. But even if it’s off-the-shelf, there are little differences from one design to the next. So even if it’s a stable architecture like 28 [gigabits per second] SerDes, which is a known design, you might only be able to re-use a portion of that because it’s very process-dependent. For 28 SerDes, you have a version to use with PCIe, with PONs (passive optical networks), and with short-reach, and you do that because you don’t want to pay the power and area penalty for re-using the same IP. That happens with automotive IP, too.”

This makes the business of developing IP extremely difficult, and the number of players has shrunk as the costs have risen.

“Even in the best days for IP, which was from the late ’90s until about 2005, reuse was limited,” said Charlie Cheng, CEO of Kilopass . “That was the golden age of fabless and IP vendors, and the customer needs were not so specific. Today, the number one thing we’re seeing is more consolidation in the industry. There is no way a company with less than $250 million in revenue can get a fab to do any custom IP. It’s the big vendors who are in control, and whatever they want in terms of IP the fabs will do it.”

For smaller companies, the way forward is much more targeted IP and a deep understanding of customer needs. “In automotive, the benefits are potentially great, but liability is 10 times as high. We had to add two voltages into our IP because they assume that if one voltage supply is dead, you need to generate voltage from the others. MCUs and sensors and one-time programmable memory have to do the same thing.”

This is a different way of approaching the IP reuse problem. Rather than having one IP design that is re-used across huge volumes of products, the focus shifts to one design that is used in a smaller number of systems. But those systems aren’t necessarily replaced from one vehicle model to the next because the design already has been proven to work within an automotive subsystem.

Another new approach relies on machine learning, particularly with regard to understanding the value of the order of tests. That becomes important for using IP in the context of a system or subsystem. “The goal is to apply the best tests to get the most coverage, and then to use tests with incremental coverage later in the development process,” Neifert said. “You need models for this because there is never enough testing. There is always an acceptable number of outstanding bugs and an acceptable number of verification cycles. However, if you can free up more cycles you can run more tests, providing more effective coverage. So basically, you’re developing better tests, and using the extra time to do more verification.”

Legal issues
Not all IP reuse challenges are new. In the early days of commercially available IP, the big concern among IP vendors was IP theft and data leakage. In fact, in the early part of the millennium, IP theft was cited as the No. 1 reason why big IP companies were hesitant to do business in China. The problem has grown since then and become much more diffuse.

“It’s not just about China anymore,” said ClioSoft’s Adhikary. “It’s also happening in India, Europe and the United States, where people copy IP to USBs. The solution is to set up access control and to establish a good, customizable workflow so you can’t just download IP within an organization. In some cases, questions about who can use IP need to go all the way to the CEO or one level of hierarchy below that. You need to know why they want to use IP and for what projects. You also need to know whether there are license agreements for the IP, whether those are still valid, and if they are valid, whether they are being honored, from the PHY level down to the kernel level.”

But outright theft is only one piece of the problem. Another problem, which is harder to quantify, involves data leakage across an ecosystem. “If there is crowdsourcing, you may need to share information across an ecosystem,” Adhikary said. “How you communicate with developers and with people using the IP can cause issues. You need to keep track of all of that. But it’s more than just IP blocks. It also can include best practices, flows and scripts, and it can involve everything from IP blocks on chips to PCBs.”

IP licensing adds other variables into this process because it varies from one vendor to the next, and from one country to the next. In new markets such as the industrial IoT, automotive and medical devices, chips are expected to last 10 to 20 years. But in Europe, for example, IP licenses are only good for 15 years. “After 15 years, the IP license gets junked,” he noted.

Programmability and other approaches
One way around the IP re-use problem is to add more programmability directly into an SoC, an ASIC, or even a package. DSPs have been providing this for some time for applications such as audio and video. ARM and Synopsys have been offering this for some time in processor cores.
Embedded FPGAs are a more recent entrant. While not simple to design into chips, the big benefit of this approach is they can be sized for a particular application and reprogrammed post-silicon.

“There’s a very intense desire to rightsize FPGAs,” said Steve Mensor, vice president of marketing at Achronix. “This is an economic decision. But it’s something of a chicken and egg problem because not everyone will consider IP until it’s proven in test chips. So they won’t re-use it until they can de-risk it.”

With the number of protocol changes, though, having that kind of flexibility changes the business dynamics. This is particularly true in data centers, where computing is undergoing massive shifts.

“They want to build data centers and not replace chips,” said Geoff Tate, chairman and CEO of Flex Logix. “If the protocol changes, you don’t have to replace a switch or a network interface chip. You change the protocol. As data centers become bigger, some of these companies are adding their own protocols. This is also important for wireless base stations, where requirements are different in every country. And it’s important for microcontrollers, because there are dozens of variations.”

There is flexibility around the edges of IP, as well. NoC vendors have been sorting through incompatibilities and new versions of IP for years.

“Even with the best IP and tools to manage the process, you can get into trouble really fast,” said Anush Mohandass, vice president of marketing and business development at NetSpeed Systems. “You think you’re using the same IP, but you change the CPU and you expect everything to work the same and it doesn’t. So you have the same memory controller, but you have different caching in the CPU and you get a deadlock. People get a false sense of confidence that if they put it together it will work, but they find just the opposite.”

On-chip networks do help to smooth out IP reuse, though. “Most customers re-use at least some IP,” said Kurt Shuler, vice president of marketing at ArterisIP. “If it’s RTL-level IP, you can resynthesize it. And with CPU cores, when you upgrade to the next platform you can use the old one or the new one that is pre-synthesized. You do have to tweak it with different processes, though. As you get beyond 16nm, you have to do more back-end process-specific things. But with more mature processes, a lot of times you can just hit the button.”

Shuler noted that with advanced packaging, this should get easier, particularly as standards such as CCIX take root. “CCIX is getting traction from the standpoint that at least people are talking about it in relation to products.”

Integrating and using IP is difficult as complexity rises. Re-using IP is often more difficult, in part because companies make assumptions that what worked in the past will continue to work equally well in the future. That’s not the case, and it is driving significant changes in the IP world, both from the user and the vendor side.

This isn’t all bad news, but it does raise the stakes for IP vendors. It also requires companies to seek out opportunities in different places and with different business models, along with a much deeper understanding of the markets in which that IP will be used and re-used.

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