European Mask And Lithography Conference 2024 Worth Attending


The European Mask and Lithography Conference (EMLC) 2024 recently was held in Grenoble, France, and had about 190 participants from a wide range of companies and institutions. Being relatively new to the field of lithography (my background is EDA, machine learning, optimization) and not being a fan of gigantic conferences, I thought it would be a good idea to visit this conference. My main p... » read more

Step Towards 3D PICs: Low Loss Fiber-Coupled Interconnects (UIUC)


A new technical paper titled "Low loss fiber-coupled volumetric interconnects fabricated via direct laser writing" was published by researchers at University of Illinois Urbana-Champaign (UIUC). Abstract "Photonic integrated circuits (PICs) are vital for high-speed data transmission. However, optical routing is limited in PICs composed of only one or a few stacked planes. Further, coupling ... » read more

Single Vs. Multi-Patterning Advancements For EUV


As semiconductor devices become more complex, so do the methods for patterning them. Ever-smaller features at each new node require continuous advancements in photolithography techniques and technologies. While the basic lithography process hasn’t changed since the founding of the industry — exposing light through a reticle onto a prepared silicon wafer — the techniques and technology ... » read more

Photoresist Materials Development


Toru Fujimori of FUJIFILM Corporation provides an overview of the development of photoresist materials for masks and wafers to support continued pattern shrinkage and address stochastic issues in lithography. » read more

Exploring The Fundamentals Of Photolithography


In the semiconductor materials industry, photolithography is a crucial technology for creating intricate electronic circuits. Essentially, it’s the art of printing at the nanoscale level, enabling the precise patterning of semiconductor materials. The ability to do this well is important for companies in the industry because it determines how detailed and efficient microchips can be. This aff... » read more

Accelerating Innovation With An E-Beam Lithography System


By Al Blais and Johnny Yeap Traditional lithography remains a standard in the industry, providing precision and a relatively cost-effective way to create patterns on the wafer when producing very high volumes of chips. However, cycle times can be long depending on the complexity of the masks that must be made. The emergence of maskless e-beam lithography is providing a complementary path ... » read more

Sidestepping Lithography In Chip Manufacturing


Rising lithography costs, shrinking feature sizes, and the need for an alternative to copper are collectively spurring new interest in area-selective deposition. An extension of atomic layer deposition, ASD seeks to build circuit features from the bottom up, without relying on lithography. Lithography will remain a critical tool for the foreseeable future. But it has long been the most expen... » read more

Navigating The GPU Revolution


Experts at the Table: Semiconductor Engineering sat down to discuss the impact of GPU acceleration on mask design and production and other process technologies, with Aki Fujimura, CEO of D2S; Youping Zhang, head of ASML Brion; Yalin Xiong, senior vice president and general manager of the BBP and reticle products division at KLA; and Kostas Adam, vice president of engineering at Synopsys. What f... » read more

eBeam Initiative Marks Major Milestones Over 15 Years Of Photomasks And Lithography


The eBeam initiative celebrated its 15th anniversary at the recent SPIE Advanced Lithography + Patterning Conference. 130 members of the mask and lithography community attended the annual lunch to mark the milestone. The eBeam Initiative welcomed its 53rd member, FUJIFILM Corporation, having grown from 20 members and advisors at its launch. FUJIFILM is the first company from the chemical supply... » read more

Fabrication Of Vertical-Taper Structures For Silicon Photonic Devices By Using Local-Thickness-Thinning Process


Authors: Shunsuke Abe, Hideo Hara, Shin Masuda, and Hirohito Yamada. This paper describes a simple fabrication process of verticaltaper structures which can locally tune the thickness of silicon photonic devices. For low-loss spot-size conversion, taper angles less than 10° are required. To fabricate the gradual-slope shape of the vertical tapers, we have developed a step-andexposure lithog... » read more

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