tag: lithography

More Accurate And Detailed Analysis of Semiconductor Defects In SEM Images Using SEMI-PointRend
By Technical Paper Link - 10 Mar, 2023 - Comments: 0

A technical paper titled "SEMI-PointRend: Improved Semiconductor Wafer Defect Classification and Segmentation as Rendering" was published (preprint) by researchers at imec, University of Ulsan, and KU Leuven. Abstract: "In this study, we applied the PointRend (Point-based Rendering) method to semiconductor defect segmentation. PointRend is an iterative segmentation algorithm inspired by ima... » read more

Process Innovations Enabling Next-Gen SoCs and Memories
By Laura Peters - 20 Feb, 2023 - Comments: 0

Achieving improvements in performance in advanced SoCs and packages — those used in mobile applications, data centers, and AI — will require complex and potentially costly changes in architectures, materials, and core manufacturing processes. Among the options under consideration are new compute architectures, different materials, including thinner barrier layers and those with higher th... » read more

Measuring 3D Sidewall Topography & LER for Photoresist Patterns Using Tip-Tilting AFM Technology
By Technical Paper Link - 19 Feb, 2023 - Comments: 0

A new technical paper titled "Enhancing the precision of 3D sidewall measurements of photoresist using atomic force microscopy with a tip-tilting technique" by researchers at National Metrology Institute of Japan (NMIJ) and National Institute of Advanced Industrial Science and Technology (AIST). "We have developed a technique for measuring the sidewall of the resist pattern using atomic for... » read more

Devices And Transistors For The Next 75 Years
By Laura Peters - 16 Feb, 2023 - Comments: 0

The 75th anniversary of the invention of the transistor sparked a lively panel discussion at IEDM, spurring debate about the future of CMOS, the role of III-V and 2D materials in future transistors, and what will be the next great memory architecture.[1] Industry veterans from the memory, logic, and research communities see high-NA EUV production, NAND flash with 1,000 layers, and hybrid bon... » read more

Mapping The Future Of Lithography
By Harry Levinson - 16 Feb, 2023 - Comments: 0

The SPIE Advanced Lithography + Patterning (AL+P) Symposium is always an informative event for lithographers, and looking at the Advance Program, it appears that AL+P 2023 will be no exception. The progress being made on key lithographic challenges is consistently of interest to attendees, and there will be many timely presentations that address issues of current significance. For example, r... » read more

Increased Photomask Density And Its Impact On EDA
By Ed Sperling - 13 Dec, 2022 - Comments: 0

The ability to print curvilinear shapes on photomasks can have big repercussions on semiconductor design. Aki Fujimura, CEO of D2S, explains why mask rule checking has been bound by complex design rules, and why curvilinear shapes are important for reducing margin and simplifying the chip design process. » read more

Lithography Modeling: Data Augmentation Framework
By Technical Paper Link - 17 Nov, 2022 - Comments: 0

A new technical paper titled "An Adversarial Active Sampling-based Data Augmentation Framework for Manufacturable Chip Design" was published by researchers at the University of Texas at Austin, Nvidia, and the California Institute of Technology. Abstract: "Lithography modeling is a crucial problem in chip design to ensure a chip design mask is manufacturable. It requires rigorous simulation... » read more

Week In Review: Semiconductor Manufacturing, Test
By Karen Heyman - 21 Oct, 2022 - Comments: 0

Fallout from the new U.S. export controls continues. Under new regulations, companies looking to supply Chinese chipmakers with advanced manufacturing equipment (<14nm) must first obtain a license from the U.S. Department of Commerce. In addition, U.S. persons (citizens and permanent residents) are barred from supporting China’s advanced chip development or production without a license. ... » read more

Thermal Scanning Probe Lithography
By Technical Paper Link - 13 Oct, 2022 - Comments: 0

A new technical paper titled "Edge-Contact MoS2 Transistors Fabricated Using Thermal Scanning Probe Lithography" was published by researchers at École Polytechnique Fédérale de Lausanne (EPFL). "Thermal scanning probe lithography (t-SPL) is a gentle alternative to the typically used electron beam lithography to fabricate these devices avoiding the use of electrons, which are well known to... » read more

Analysis Of Pattern Distortion By Panel Deformation And Addressing It By Using Extremely Large Exposure Field Fine-Resolution Lithography
By Onto Innovation - 11 Oct, 2022 - Comments: 0

The growing demand for heterogeneous integration is driven by the 5G market. This includes smartphones, data centers, servers, high-performance computing (HPC), artificial intelligence (AI) and internet of things (IoT) applications. Next-generation packaging technologies require tighter overlay to accommodate larger package sizes with fine-pitch chip interconnects on large-format flexible panel... » read more

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