Slow Progress On Generative EDA

By Brian Bailey - 26 Nov, 2024 - Comments: 0

Progress is being made in generative EDA, but the lack of training data remains the biggest problem. Some areas are finding ways around this. Generative AI, driven by large language models (LLMs), stormed into the world just two years ago, and since then has worked its way into almost every aspect of our lives. Some people love it, others hate it, and some even give dire warnings about machi... » read more

How AI Is Transforming System Design

By Adam Kovac - 26 Nov, 2024 - Comments: 0

Experts At The Table: ChatGPT and other LLMs have attracted most of the attention in recent years, but other forms of AI have long been incorporated into design workflows. The technology has become so common that many designers may not even realize it’s a part of the tools they use every day. But its adoption is spreading deeper into tools and methodologies. Semiconductor Engineering sat down... » read more

Small Language Models: A Solution To Language Model Deployment At The Edge?

By Paul Karazuba - 18 Nov, 2024 - Comments: 0

While Large Language Models (LLMs) like GPT-3 and GPT-4 have quickly become synonymous with AI, LLM mass deployments in both training and inference applications have, to date, been predominately cloud-based. This is primarily due to the sheer size of the models; the resulting processing and memory requirements often overwhelm the capabilities of edge-based systems. While the efficiency of Exped... » read more

New AI Data Types Emerge

By Bryon Moyer - 14 Nov, 2024 - Comments: 0

AI is all about data, and the representation of the data matters strongly. But after focusing primarily on 8-bit integers and 32‑bit floating-point numbers, the industry is now looking at new formats. There is no single best type for every situation, because the choice depends on the type of AI model, whether accuracy, performance, or power is prioritized, and where the computing happens, ... » read more

Yield Management Embraces Expanding Role

By Laura Peters - 12 Nov, 2024 - Comments: 0

Competitive pressures, shrinking time-to-market windows, and increased customization are collectively changing the dynamics and demands for yield management systems, shifting left from the fab to the design flow and right to assembly, packaging, and in-field analysis. The basic role of yield management systems is still expediting new product introductions, reducing scrap, and delivering grea... » read more

Benchmark and Evaluation Framework For Characterizing LLM Performance In Formal Verification (UC Berkeley, Nvidia)

By Technical Paper Link - 04 Nov, 2024 - Comments: 0

A new technical paper titled "FVEval: Understanding Language Model Capabilities in Formal Verification of Digital Hardware" was published by researchers at UC Berkeley and NVIDIA. Abstract "The remarkable reasoning and code generation capabilities of large language models (LLMs) have spurred significant interest in applying LLMs to enable task automation in digital chip design. In particula... » read more

LLMs Show Promise In Secure IC Design

By Adam Kovac - 21 Oct, 2024 - Comments: 0

The introduction of large language models into the EDA flow could significantly reduce the time, effort, and cost of designing secure chips and systems, but they also could open the door to more sophisticated attacks. It's still early days for the use of LLMs in chip and system design. The technology is just beginning to be implemented, and there are numerous technical challenges that must b... » read more

Mass Customization For AI Inference

By Ann Mutschler - 17 Oct, 2024 - Comments: 0

Rising complexity in AI models and an explosion in the number and variety of networks is leaving chipmakers torn between fixed-function acceleration and more programmable accelerators, and creating some novel approaches that include some of both. By all accounts, a general-purpose approach to AI processing is not meeting the grade. General-purpose processors are exactly that. They're not des... » read more

Survey: HW SW Co-Design Approaches Tailored to LLMs

By Technical Paper Link - 11 Oct, 2024 - Comments: 0

A new technical paper titled "A Survey: Collaborative Hardware and Software Design in the Era of Large Language Models" was published by researchers at Duke University and Johns Hopkins University. Abstract "The rapid development of large language models (LLMs) has significantly transformed the field of artificial intelligence, demonstrating remarkable capabilities in natural language proce... » read more

Novel NorthPole Architecture Enables Low-Latency, High-Energy-Efficiency LLM inference (IBM Research)

By Technical Paper Link - 27 Sep, 2024 - Comments: 0

A new technical paper titled "Breakthrough low-latency, high-energy-efficiency LLM inference performance using NorthPole" was published by researchers at IBM Research. At the IEEE High Performance Extreme Computing (HPEC) Virtual Conference in September 2024, new performance results for their AIU NorthPole AI inference accelerator chip were presented on a 3-billion-parameter Granite LLM. ... » read more

← Older posts

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

NAND Flash Targets 1,000 Layers

New techniques go beyond improved deposition and etching, but challenges stack up, too.

by Bryon Moyer

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.