tag: LLMs

The Architecture Decisions Behind A Production-Ready EDA AI Agent
By Emma-Jane Crozier - 09 Jul, 2026 - Comments: 0

The conversation about agentic AI in semiconductor and PCB design tends to focus on capability: what the agent can do, how much time it saves, and which parts of the workflow it can automate. That is a reasonable place to start, but that is not where the hard engineering happens. Organizations are now asking whether AI agents can take on meaningful portions of the workflow, not as assistants th... » read more

LLM Agents To Refactor Software For High Level Synthesis (Carnegie Mellon, UCLA)
By Technical Paper Link - 03 Jul, 2026 - Comments: 0

Researchers from Carnegie Mellon University and UCLA published a technical paper titled “AgRefactor: Self-Evolving Agentic Workflow for HLS Compatibility and Performance.” The paper introduces an “LLM-based multi-agent workflow  for refactoring software into HLS-compatible programs" and reports a 6.51× geometric mean speedup over a state-of-the-art pragma tuning tool. Find the tec... » read more

Breaking LLMs With Fuzzing: Inside GPTFuzz’s Automated Jailbreak Machine
By Vivek Namsani - 02 Jul, 2026 - Comments: 0

Software security has long relied on a technique called fuzzing, i.e. bombarding a program with malformed, unexpected, or mutated inputs until something breaks. Tools like AFL (American Fuzzy Lop) have uncovered thousands of real-world vulnerabilities this way. At Keysight, fuzzing has been a core part of security testing for years, with extensive expertise in protocol fuzzing, dedicated fu... » read more

LLM-driven, Formal Verification-Assisted Framework For Functional-Safety-Oriented Fault Criticality Assessment (ASU, TI)
By Technical Paper Link - 29 Jun, 2026 - Comments: 0

Researchers from Arizona State University and Texas Instruments India published a technical paper titled “SafeGen: LLM-Driven Assertion Generation and Fault Criticality Evaluation for Functional Safety.” Abstract Excerpt: “This paper presents SafeGen, an LLM-driven, formal-verification-assisted framework for functional-safety-oriented fault criticality assessment.” The paper also ... » read more

Introducing An Agentic LLM For Chip Design
By Tanay Biradar - 25 Jun, 2026 - Comments: 0

By Tanay Biradar, Surya Gunukula, Tengxiao Liu, and Kexun Zhang ChipAgents has introduced Renoir, an agentic large language model (LLM) whose name means "renew." In early chip design benchmarks, Renoir outperforms the base model it was trained on and cuts costs by more than half. Furthermore, it can run entirely on-premises, allowing semiconductor companies to develop faster without compromi... » read more

Beyond The Demo: Deploying And Evaluating Open-Source AI Workloads
By Odin Shen - 11 Jun, 2026 - Comments: 0

As more open-source AI models move closer to real-world adoption, developers are changing how they evaluate edge deployment. The question is no longer simply whether a model can run, but whether it can be deployed reproducibly on a concrete platform, observed in practice, and turned into meaningful deployment decisions based on actual technical evidence. For developers, the CIX Armv9 platfor... » read more

Building Multi-Agent Systems For ASIC Flows
By Ed Sperling - 10 Jun, 2026 - Comments: 0

If one AI agent can solve a problem in a certain amount of time, can multiple agents solve it faster? The answer is yes, but only if the agents have well-defined roles and targets. This is where orchestrators fit in, and why they are so critical to agentic AI. Kexun Zhang, head of research at ChipAgents, talks about what exactly AI agents are, how they can be used to solve big problems that wou... » read more

The Edge LLM Offload Story
By Karthikeyan Shanmuga Vadivel - 04 Jun, 2026 - Comments: 0

By Karthikeyan Shanmuga Vadivel and Sauryadeep Pal Developers and system architects today face a growing demand to enable large language model variants on device. They are facing pressure to support transformer-capable models on constrained devices to ensure data privacy, eliminate cloud API charges, and provide offline reliability. On-device execution is also becoming a necessity to meet st... » read more

Toward Agentic Verification
By Brian Bailey - 28 May, 2026 - Comments: 1

Key Takeaways: Agentic verification provides flow orchestration for common repetitive tasks. Capabilities will expand when tools can learn from a larger context, including the specification. Design houses need to fully understand the costs and benefits and plan accordingly. Agentic verification is more than a buzzword. It is a pivotal moment in the evolution of verification ... » read more

Faster Verification Debug With AI
By Taruna Reddy - 28 May, 2026 - Comments: 0

Every stage of semiconductor development takes longer and requires more effort with each new generation of chips. At no stage is this more apparent than functional verification. Industry consensus is that verification consumes roughly two-thirds of development time and resources. Within verification, debug is the most challenging step, consuming a third to two-thirds of the effort. Any serious ... » read more

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