tag: LLMs

The Shape Of Prompts: Exploring Their Effect On Inference Infrastructure
By Amritam Putatunda - 28 May, 2026 - Comments: 0

AI inference prompts exhibit a shape-shifting behavior, arriving in many forms and attempting to fit themselves within the constraints of the inference stack. Ultimately, it is the design of the inference infrastructure that determines whether it can sustain a large volume of prompts or only a limited number. Prompts are not uniform transactions; they represent dynamic workload profiles whose ... » read more

Large-scale, SRAM-based LLM Inference Deployment (Groq)
By Technical Paper Link - 21 May, 2026 - Comments: 0

A new technical paper, "SHIP: SRAM-Based Huge Inference Pipelines for Fast LLM Serving," was published by researchers at Nvidia, with work done while at Groq. Abstract "The proliferation of large language models (LLMs) demands inference systems with both low latency and high efficiency at scale. GPU-based serving relies on HBM for model weights and KV caches, creating a memory bandwidth b... » read more

Why Vision LLMs Force A Rethink Of Edge AI Hardware
By Athish Rao - 14 May, 2026 - Comments: 0

As vision-centric large language models move on-device, performance measured in raw TOPS is no longer enough. Architectures need to be built around real workloads, memory behavior, and sustained utilization, especially at the edge. Vision LLMs are changing the edge AI equation For the last decade, most edge AI silicon has been built to do one job extremely well: run convolutional networks for... » read more

Silent Data Corruption: A Major Reliability Challenge in Large-Scale LLM Training (TU Berlin)
By Technical Paper Link - 12 Apr, 2026 - Comments: 0

A new technical paper, "Exploring Silent Data Corruption as a Reliability Challenge in LLM Training," was published by researchers at Technische Universitat Berlin. Abstract "As Large Language Models (LLMs) scale in size and complexity, the consequences of failures during training become increasingly severe. A major challenge arises from Silent Data Corruption (SDC): hardware-induced faults... » read more

Automated Security Assertion Generation Using LLMs (U. of Florida)
By Technical Paper Link - 03 Apr, 2026 - Comments: 0

A new technical paper, "Assertain: Automated Security Assertion Generation Using Large Language Models," was published by University of Florida. Abstract "The increasing complexity of modern system-on-chip designs amplifies hardware security risks and makes manual security property specification a major bottleneck in formal property verification. This paper presents Assertain, an automated ... » read more

An Exploration of Agent Scaling for HLS Design Space Exploration (IBM)
By Technical Paper Link - 31 Mar, 2026 - Comments: 0

A new technical paper, "Agent Factories for High Level Synthesis: How Far Can General-Purpose Coding Agents Go in Hardware Optimization?" was published by IBM. Abstract "We present an empirical study of how far general-purpose coding agents – without hardware-specific training – can optimize hardware designs from high-level algorithmic specifications. We introduce an agent factory, a ... » read more

How SW and HW Vulnerabilities Can Complement LLM-Specific Algorithmic Attacks (UT Austin, Intel et al.)
By Technical Paper Link - 20 Mar, 2026 - Comments: 0

A new technical paper, "Cascade: Composing Software-Hardware Attack Gadgets for Adversarial Threat Amplification in Compound AI Systems," was published by the University of Texas, Austin, Intel Labs, Symmetry Systems, Microsoft and Georgia Tech. Abstract "Rapid progress in generative AI has given rise to Compound AI systems - pipelines comprised of multiple large language models (LLM), so... » read more

A Framework That Generates Chip Layouts Directly From Natural Language Specifications (U. of Bristol, RAL)
By Technical Paper Link - 09 Mar, 2026 - Comments: 1

A new technical paper, "NL2GDS: LLM-aided interface for Open Source Chip Design," was published by researchers at University of Bristol and Rutherford Appleton Laboratory. Abstract "The growing complexity of hardware design and the widening gap between high-level specifications and register-transfer level (RTL) implementation hinder rapid prototyping and system design. We introduce NL2GDS (... » read more

Limiting AI/ML Tools To Ensure Physical AI Safety, Security
By Liz Allan - 05 Mar, 2026 - Comments: 0

Key Takeaways: AI-based tools can help monitor physical AI systems and LLMs, but human oversight is still needed to avoid false positives, bias, and other anomalies. For autonomous vehicles and robots, edge case scenarios and understanding human values are weak points, especially as moral and social values change over time. AI tools are growing and becoming increasingly helpful for c... » read more

Survey of GenAI Across the Full Computing Stack, From SW To Silicon (Harvard)
By Technical Paper Link - 22 Feb, 2026 - Comments: 0

Harvard University researchers published "GenAI for Systems: Recurring Challenges and Design Principles from Software to Silicon." Abstract "Generative AI is reshaping how computing systems are designed, optimized, and built, yet research remains fragmented across software, architecture, and chip design communities. This paper takes a cross-stack perspective, examining how generative models... » read more

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