tag: LLMs

The On-Device LLM Revolution
By Steve Roddy - 20 Feb, 2026 - Comments: 0

The AI world is experiencing a fundamental shift. After years of cloud-centric inference dominated by massive data center GPUs, we're witnessing an accelerating migration of language models to edge devices. These are not the trillion-parameter behemoths that require server farms, but the "Goldilocks zone" models: 3B to 30B parameters — large enough to deliver genuinely useful AI capabilities,... » read more

LLM-Based Learning Platform For Chip Design Education (RPTU)
By Technical Paper Link - 15 Feb, 2026 - Comments: 0

RPTU University of Kaiserslautern-Landau researchers published "From RTL to Prompt Coding: Empowering the Next Generation of Chip Designers through LLMs." Abstract "This paper presents an LLM-based learning platform for chip design education, aiming to make chip design accessible to beginners without overwhelming them with technical complexity. It represents the first educational platform... » read more

Scaling llama.cpp On Neoverse N2: Solving Cross-NUMA Performance Issues
By Bolt Liu - 12 Feb, 2026 - Comments: 0

This blog post explains the cross-NUMA memory access issue that occurs when you run llama.cpp in Neoverse. It also introduces a proof-of-concept patch that addresses this issue and can provide up to a 55% performance increase for text generation when you run the llama3_Q4_0 model on the ZhuFeng Neoverse system. Cross-NUMA memory access problem In llama.cpp, performance drops when the number o... » read more

Benchmark For AI-Aided Chip Design That Evaluates LLMs Across 3 Critical Tasks (UCSD, Columbia)
By Technical Paper Link - 30 Jan, 2026 - Comments: 0

Researchers at UCSD and Columbia University published "ChipBench: A Next-Step Benchmark for Evaluating LLM Performance in AI-Aided Chip Design." Abstract "While Large Language Models (LLMs) show significant potential in hardware engineering, current benchmarks suffer from saturation and limited task diversity, failing to reflect LLMs' performance in real industrial workflows. To address t... » read more

Balancing Training, Quantization, And Hardware Integration In NPUs
By Ann Mutschler - 26 Jan, 2026 - Comments: 0

Experts At The Table: AI/ML is driving a steep ramp in neural processing unit (NPU) design activity for everything from data centers to edge devices such as PCs and smartphones. Semiconductor Engineering sat down to discuss this with Jason Lawley, director of product marketing, AI IP at Cadence; Sharad Chole, chief scientist and co-founder at Expedera; Steve Roddy, chief marketing officer at Qu... » read more

LLM- Based Techniques To Support Behavior-Driven Development For HW Design (U. of Bremen, DFKI)
By Technical Paper Link - 22 Dec, 2025 - Comments: 0

A new technical paper titled "LLM-based Behaviour Driven Development for Hardware Design" was published by researchers at University of Bremen/DFKI. Abstract "Test and verification are essential activities in hardware and system design, but their complexity grows significantly with increasing system sizes. While Behavior Driven Development (BDD) has proven effective in software engineerin... » read more

Data-Centric ML Compiler For PIM (U. of Toronto, Barcelona Supercomputing Center, ETH Zurich, Max Planck)
By Technical Paper Link - 19 Dec, 2025 - Comments: 0

A new technical paper titled "A Tensor Compiler for Processing-In-Memory Architectures" was published by researchers at University of Toronto, Barcelona Supercomputing Center, ETH Zurich, and the Max Planck Institute for Software Systems. Abstract "Processing-In-Memory (PIM) devices integrated with high-performance Host processors (e.g., GPUs) can accelerate memory-intensive kernels in Ma... » read more

AI Workloads at the Edge: Ensuring Performance, Privacy, and Security
By Ann Mutschler - 17 Dec, 2025 - Comments: 0

Experts At The Table: Semiconductor Engineering gathered a group of experts to discuss why some AI workloads are better suited for on-device processing to achieve consistent performance, avoid network connectivity issues, reduce cloud computing costs, and ensure privacy. The panel included Frank Ferro, group director in the Silicon Solutions Group at Cadence; Eduardo Montanez, vice president a... » read more

Generative AI In Chip Manufacturing
By Ed Sperling - 15 Dec, 2025 - Comments: 0

Generative AI is a natural-language or text-based query, predicting patterns based on a massive set of data. While most of the attention has been focused on chatbots and copilots, it also can be used to identify small, transient aberrations in semiconductor manufacturing that are otherwise difficult to find. Jon Herlocker, vice president and general manager of software analytics at Cohu, talks ... » read more

Ensuring Accuracy in LLM-Generated Hardware Logic Design Automation (IBM Research)
By Technical Paper Link - 08 Dec, 2025 - Comments: 0

A new technical paper "Mitigating hallucinations and omissions in LLMs for invertible problems: An application to hardware logic design automation" was published by researchers at IBM Research. Abstract "We show for invertible problems that transform data from a source domain (for example, Logic Condition Tables (LCTs)) to a destination domain (for example, Hardware Description Language (... » read more

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