tag: low-k dielectrics

Nanosheet GAAFETs: Compact Modeling (Politecnico di Torino)
By Technical Paper Link - 07 Jun, 2023 - Comments: 0

A technical paper titled “NS-GAAFET Compact Modeling: Technological Challenges in Sub-3-nm Circuit Performance” was published by researchers at Politecnico di Torino. Abstract: "NanoSheet-Gate-All-Around-FETs (NS-GAAFETs) are commonly recognized as the future technology to push the digital node scaling into the sub-3 nm range. NS-GAAFETs are expected to replace FinFETs in a few years, as ... » read more

Mechanical Characterization Of Ultra Low-k Dielectric Films
By Bruker - 08 Feb, 2023 - Comments: 0

Dielectric materials are of critical importance in the function of microelectronic devices because they electrically isolate conductive components from one another in microcircuits. Capacitance between conductors can limit a circuit’s maximum operating frequency, and the capacitance increases in inverse proportion to the separation distance between the conductors. Therefore, to minimize the s... » read more

Power/Performance Bits: May 10
By Jesse Allen - 10 May, 2021 - Comments: 0

Probabilistic bit Researchers at Tohoku University are working on building probabilistic computers by developing a spintronics-based probabilistic bit (p-bit). The researchers utilized magnetic tunnel junctions (MTJs). Most commonly used in MRAM technology, where thermal fluctuation typically poses a threat to the stable storage of information, in this case it was a benefit. The p-bits f... » read more

The Race To 10/7nm
By Mark LaPedus - 22 May, 2017 - Comments: 4

Amid the ongoing ramp of 16/14nm processes in the market, the industry is now gearing up for the next nodes. In fact, GlobalFoundries, Intel, Samsung and TSMC are racing each other to ship 10nm and/or 7nm technologies. The current iterations of 10nm and 7nm technologies are scaled versions of today’s 16nm/14nm finFETs with traditional copper interconnects, high-k/metal-gate and low-k diele... » read more

Politics And (Low) Power
By Ed Sperling - 10 Nov, 2016 - Comments: 4

This week the entire semiconductor market woke up with a severe political hangover. Aside from the initial shock of the election results themselves, the winning platform of "America First" could have far-reaching implications for an industry that has spent decades optimizing a global supply chain the way it has finely tuned other processes to reduce the cost per transistor. There are many un... » read more

7nm Fab Challenges
By Mark LaPedus - 21 Apr, 2016 - Comments: 3

Leading-edge foundry vendors have made the challenging transition from traditional planar processes into the finFET transistor era. The first [getkc id="185" kc_name="finFETs"] were based on the 22nm node, and now the industry is ramping up 16nm/14nm technologies. Going forward, the question is how far the finFET can be scaled. In fact, 10nm finFETs from Samsung are expected to ramp by ye... » read more

Inside Process Technology
By Mark LaPedus - 21 Apr, 2016 - Comments: 1

Semiconductor Engineering sat down to discuss the foundry business, memory, process technology, lithography and other topics with David Fried, chief technology officer at [getentity id="22210" e_name="Coventor"], a supplier of predictive modeling tools. What follows are excerpts of that conversation. SE: Chipmakers are ramping up 16nm/14nm finFETs today, with 10nm and 7nm finFETs just around... » read more

Why Use A Package?
By Ed Sperling - 21 Jan, 2016 - Comments: 0

Subramanian Iyer, distinguished chancellor's professor in UCLA's Electrical Engineering Department—and a former fellow and director of the systems scaling technology department at IBM—sat down with Semiconductor Engineering to talk about the future of chip scaling. What follows are excerpts of that conversation. SE: Advanced packaging is being viewed as a way to extend scaling in the fut... » read more

Sponges, Skyscrapers, And Low-K
By Katherine Derbyshire - 20 Apr, 2015 - Comments: 1

A sponge is a porous structure. So is a skyscraper. These two very different images exemplify the materials being considered for advanced low dielectric constant (κ) materials. Most porous dielectrics that have been tested up to this point resemble sponges. As Intel’s David Michalak explained at this month's Materials Research Society (MRS) Spring Meeting, these materials consist of a ba... » read more

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