tag: low-power design

Shifting Toward Data-Driven Chip Architectures
By Ed Sperling and Ann Mutschler - 16 Jun, 2021 - Comments: 0

An explosion in data is forcing chipmakers to rethink where to process data, which are the best types of processors and memories for different types of data, and how to structure, partition and prioritize the movement of raw and processed data. New chips from systems companies such as Google, Facebook, Alibaba, and IBM all incorporate this approach. So do those developed by vendors like Appl... » read more

Power Optimization: What’s Next?
By Brian Bailey - 17 May, 2021 - Comments: 2

Concerns about the power consumed by semiconductors has been on the rise for the past couple of decades, but what can we expect to see coming in terms of analysis and automation from EDA companies, and is the industry ready to make the investment? Ever since Dennard scaling stopped providing automatic power gains by going to a smaller geometry, circa 2006, semiconductors have been increasing... » read more

11 Ways To Reduce AI Energy Consumption
By Bryon Moyer - 13 May, 2021 - Comments: 1

As the machine-learning industry evolves, the focus has expanded from merely solving the problem to solving the problem better. “Better” often has meant accuracy or speed, but as data-center energy budgets explode and machine learning moves to the edge, energy consumption has taken its place alongside accuracy and speed as a critical issue. There are a number of approaches to neural netw... » read more

Steep Spike For Chip Complexity And Unknowns
By Ed Sperling - 05 May, 2021 - Comments: 0

Cramming more and different kinds of processors and memories onto a die or into a package is causing the number of unknowns and the complexity of those designs to skyrocket. There are good reasons for combining all of these different devices into an SoC or advanced package. They increase functionality and can offer big improvements in performance and power that are no longer available just b... » read more

Putting Limits On What AI Systems Can Do
By Ed Sperling - 22 Apr, 2021 - Comments: 0

New techniques and approaches are starting to be applied to AI and machine learning to ensure they function within acceptable parameters, only doing what they're supposed to do. Getting AI/ML/DL systems to work has been one of the biggest leaps in technology in recent years, but understanding how to control and optimize them as they adapt isn't nearly as far along. These systems are generall... » read more

Many Chiplet Challenges Ahead
By Brian Bailey - 12 Apr, 2021 - Comments: 0

Over the past couple of months, Semiconductor Engineering has looked into several aspects of 2.5D and 3D system design, the emerging standards and steps that the industry is taking to make this more broadly adopted. This final article focuses on the potential problems and what remains to be addressed before the technology becomes sustainable to the mass market. Advanced packaging is seen as ... » read more

Designing Low Energy Chips And Systems
By Ann Mutschler - 01 Feb, 2021 - Comments: 1

Energy optimization is beginning to shift left as design teams begin examining new ways to boost the performance of devices without impacting battery life or ratcheting up electricity costs. Unlike power optimization, where a skilled engineering team may reduce power by 1% to 5%, energy efficiency may be able to cut effective power in half. But those gains require a significant rethinking of... » read more

Hidden Costs In Faster, Low-Power AI Systems
By Ed Sperling - 20 Jan, 2021 - Comments: 1

Chipmakers are building orders of magnitude better performance and energy efficiency into smart devices, but to achieve those goals they also are making tradeoffs that will have far-reaching, long-lasting, and in some cases unknown impacts. Much of this activity is a direct result of pushing intelligence out to the edge, where it is needed to process, sort, and manage massive increases in da... » read more

An Integrated Approach To Power Domain And Clock Domain Crossing Verification
By Siemens EDA - 13 Jan, 2021 - Comments: 0

Reducing power consumption is essential for both mobile and data center applications. The challenge is to lower power while minimally impacting performance. The solution has been to partition designs into multiple power domains which allow selectively reducing voltage levels or powering off partitions. Traditional low power verification validates only the functional correctness of power control... » read more

2020: A Turning Point In The Chip Industry
By Brian Bailey - 28 Dec, 2020 - Comments: 3

At the start of 2020, most of the industry was upbeat and sales forecasts for the year were good. Then the pandemic hit, and fear gripped most of the industry — but not for long. New markets emerged, demand increased, and the levels of innovation went far beyond what had been forecast. While hope is on the horizon that the virus will be contained during 2021, life will not return to the ol... » read more

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