Efficiency Vs. Accuracy


By Barry Pangrle If all you have is a hammer, everything looks like a nail. I wrote an article, Power vs. Accuracy, last year that discussed tradeoffs between power and accuracy for different applications. It turns out that for a number of processing applications, if every bit isn’t perfect, the impact on the final result might not be all that great. Anyone performing financial analytical... » read more

Chenming Hu: SOI Can Empower New Transistors to 10nm and beyond


The following is a special guest post by Dr. Chenming Hu, TSMC Distinguished Professor at UC Berkeley. He and his team published seminal papers on FinFETs (1999) and UTB-SOI (2000). This post first appeared as part of the Advanced Substrate News special edition on FD-SOI industrialization.  ~~ The good, old MOSFET is nearing its limits. Scaling issues and dopant-induced variations ... » read more

ST-Ericsson 28nm FD-SOI smartphone SOC, Q3 tape-out (interview)


ASN recently had a chance to talk to ST-Ericsson’s Chief Chip Architect Louis Tannyeres  about the move to 28nm FD-SOI for smartphones and tablet SOCs.  Take-away message:  FD-SOI solves – with less process complexity – scaling, leakage and variability issues to further shrink CMOS technology beyond 28nm. Here's what he said. ~~ [caption id="attachment_441" align="alignleft" wi... » read more

ST-Ericsson NovaThor This Year, 28nm FDSOI, Soitec Wafers


Big and official FD-SOI news: Soitec has announced that the company is supplying the FD-SOI wafers for ST-Ericsson’s next-generation of NovaThor 8540 smartphone/tablet processors. Starting at the 28nm node, this marks the industry’s first industrialization of the new planar, fully-depleted technology on ultra-thin SOI wafers. Soitec has just issued an official press release, but ST-Eri... » read more

FD-SOI Workshop ppts – STM’s 1st 28nm FD-SOI product line


The SOI Consortium’s 6th FD-SOI workshop, held just after ISSCC, yielded some exciting news. Most of the presentations are freely available for downloading from the SOI Consortium website. Here are the highlights. STMicroelectronics In a terrific presentation by Giorgio Cesana, Marketing Director at STMicroelectronics, he revealed that the company would be releasing a major product line b... » read more

Experts At The Table: Mobile Design Challenges


By Ed Sperling Low-Power Engineering sat down to discuss the increasing challenges of designing for mobile devices with Qi Wang, technical marketing group director at Cadence; Cary Chin, director of technical marketing for low-power solutions at Synopsys; Bernard Murphy, CTO of Atrenta; and Dave Reed, senior director of marketing at SpringSoft. What follows are excerpts of that conversation. ... » read more

Making Software More Efficient


By Ed Sperling Software is being targeted by most of the major chip vendors and EDA companies as the next big opportunity for saving power, but exactly which software should be modified and by whom isn’t always clear. To some extent those answers depend upon which part of the software stack vendors or engineers believe can be adjusted most easily, and so far there is no widespread agreeme... » read more

Changes In The Ecosystem


By Ed Sperling For the better part of two decades, semiconductor companies have been talking about ecosystems mostly for marketing and economic reasons. They’re now talking thinking about ecosystems for complex technology reasons that involve integrated models for power, transactions and manufacturability. In the late 1990s, IBM began assembling its own loose ecosystem as a way of shieldi... » read more

New Standards For Connectivity


By Pallab Chatterjee The last couple of months have been busy for data transfer standards. Consider the following moves: Power Line Communication (PLC) has become a new standard by the IEEE and has two groups promoting it: HD-PLC and Home Plug Alliance. Bluetooth also has made progress with the draft of the new Bluetooth Low Energy Technology as part of the July version 4 specificatio... » read more

Low-Power And RF Design Heighten Signal-Integrity Concerns


By Ellen Konieczny As active devices and interconnect wires shrink and are placed closer together with the march of Moore’s Law, signal integrity is becoming a huge concern. If it is not maintained, a design’s future may be marred by lower yields, unreliable performance, and failure to work efficiently—if at all. For low-power and radio-frequency (RF) designs, which are being prod... » read more

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