To (B)atch Or Not To (B)atch?


When evaluating benchmark results for AI/ML processing solutions, it is very helpful to remember Shakespeare’s Hamlet, and the famous line: “To be, or not to be.” Except in this case the “B” stands for Batched. Batch size matters There are two different ways in which a machine learning inference workload can be used in a system. A particular ML graph can be used one time, preced... » read more

LLMs Show Promise In Secure IC Design


The introduction of large language models into the EDA flow could significantly reduce the time, effort, and cost of designing secure chips and systems, but they also could open the door to more sophisticated attacks. It's still early days for the use of LLMs in chip and system design. The technology is just beginning to be implemented, and there are numerous technical challenges that must b... » read more

Paving The Way For Sustainable AI


Real-time requirements and the need for power-efficiency, security and privacy drives AI-processing at the edge. Key benefits of Edge AI include: -Low latency and real-time response -High power efficiency -Improved security and data privacy -Reduced cost A complementary set of AI-specific products and solutions, an end-to-end ML platform as well as an extensive application kno... » read more

The Cost Of EDA Data Storage And Processing Efficiency


Engineering teams are turning to the cloud to process and store increasing amounts of EDA data, but while the compute resources in hyperscale data centers are virtually unlimited, the move can add costs, slow access to data, and raise new concerns about sustainability. For complex chip designs, the elasticity of the cloud is a huge bonus. With advanced-node chips and packaging, the amount of... » read more

Exploring Machine Learning Enabled Microcontrollers As An Alternative To Linux-Based MPUs


In today’s rapidly evolving technology landscape, the distinction between microcontrollers (MCUs) and micro processors (MPUs) is blurring with the introduction of high-performance Arm Cortex M processors. A compelling proposition emerges when a highly integrated device, PSOC™ Edge MCU, combines the power of the Cortex®M55 with advanced graphic peripherals, DSP Helium, and a neural net... » read more

Hardware Security: One-Key Premise of Logic Locking


A new technical paper titled "Late Breaking Results: On the One-Key Premise of Logic Locking" was published by researchers at Synopsys. Abstract "The evaluation of logic locking methods has long been predicated on an implicit assumption that only the correct key can unveil the true functionality of a protected circuit. Consequently, a locking technique is deemed secure if it resists a good ... » read more

The Impact Of Simulation On The Carbon Footprint of Wafer Fab Equipment R&D


A new technical paper titled "Achieving Sustainability in the Semiconductor Industry: The Impact of Simulation and AI" was published by researchers at Lam Research. Abstract "Computational simulation has been used in the semiconductor industry since the 1950s to provide engineers and managers with a faster, more cost-effective method of designing semiconductors. With increased pressure in t... » read more

MTJ-Based CRAM Array


A new technical paper titled "Experimental demonstration of magnetic tunnel junction-based computational random-access memory" was published by researchers at University of Minnesota and University of Arizona, Tucson. Abstract "The conventional computing paradigm struggles to fulfill the rapidly growing demands from emerging applications, especially those for machine intelligence because ... » read more

Leveraging Machine Learning in Semiconductor Yield Analysis


Searching through wafer maps looking for spatial patterns is not only a very time-consuming task to be done manually, it’s also prone to human oversight and error, and nearly impossible in a large fab where there are thousands of wafers a day being processed. We developed a tool that applies automatic spatial pattern detection algorithms using ML, parametrizing pattern recognition and clas... » read more

Applying Machine Learning To Accelerate TCAD Calibration


TCAD models are the fundamental building blocks for the semiconductor industry. Whether it is a new process node or a new multi-billion dollar fab, accurate TCAD models must be developed and calibrated before they can be deployed in technology development. While TCAD models have been around for (many) decades, their complexity is growing exponentially, as is the demands placed on the R&D en... » read more

← Older posts