tag: Mentor Graphics

Power Impacting Cost Of Chips
By Brian Bailey - 15 Mar, 2017 - Comments: 0

The increase in complexity of the power delivery network (PDN) is starting to outpace increases in functional complexity, adding to the already escalating costs of modern chips. With no signs of slowdown, designers have to ensure that overdesign and margining do not eat up all of the profit margin. The semiconductor industry is used to problems becoming harder at smaller geometries, but unti... » read more

Blog Review: March 15
By Jesse Allen - 15 Mar, 2017 - Comments: 0

Cadence's Christen Decoin looks back at the changes in design rule checking and asks, with growing design sizes and rule complexity, has DRC run out of steam? Synopsys' Eric Huang provides some background on DisplayPort and its integration with the USB Type-C connector. In his latest video, Mentor's Colin Walls investigates the relationship between the choice of operating system and the p... » read more

The Week In Review: Design
By Jesse Allen - 10 Mar, 2017 - Comments: 0

SoftBank plans to sell a 25% stake in ARM to Vision Fund, a $100 billion technology fund created last year by SoftBank and Saudi Arabia's Public Investment Fund. SoftBank and Saudi Arabia are investing $25 billion and $45 billion in the fund, respectively. Another potential major player is Mubadala Development Co., the government-owned Abu Dhabi investment firm which owns GlobalFoundries and, a... » read more

Antenna Design Grows Up
By Ann Mutschler - 09 Mar, 2017 - Comments: 2

Apple’s iPhone 4 antenna issue represents a classic example of what can go wrong in modern antenna design. Put one in the wrong place, and a seemingly insignificant part can turn a cool new product into a public relations nightmare. Ever since antennas dropped out of sight, most consumers don't give them a second thought. In the 1960s, almost every home had a rooftop antenna. Fast forward ... » read more

Correlating Software Execution With Switching Activity To Save Power In SoC Designs
By Russell Klein - 09 Mar, 2017 - Comments: 0

There is probably no more pointless waste of energy than lighting and heating a room that is empty. The obvious optimization: notice that no one is there and turn off the lights. It works the same on an SoC or embedded system. To save energy, system developers are adding the ability turn off the parts of the system that are not being used. Big energy savings but with no compromise to functional... » read more

The Ultimate Shift Left
By Brian Bailey - 09 Mar, 2017 - Comments: 0

Floorplanning is becoming much more difficult due to a combination of factors—increased complexity of the power delivery network, lengthening of clock trees, rising levels of communication, and greater connectedness of [getkc id="81" kc_name="SoC"]s coupled with highly constrained routing resources. The goal of floorplanning is to determine optimal placement of blocks on a die. But connect... » read more

Power Management Validation
By Mentor, a Siemens Business - 08 Mar, 2017 - Comments: 0

Power consumption is becoming a critical aspect of hardware design. No longer is verifying an SoC solely answering the question “does it work?” Now designers must also answer the question “does it meet my power budget?” When trying to find power issues it is critical to run the complete system in a realistic manner—at the system-level when the design/verification team is looking at th... » read more

Blog Review: March 8
By Jesse Allen - 08 Mar, 2017 - Comments: 0

Mentor's Andrew Macleod proposes that the growing complexity of automotive systems opens up room for a Tier 1.5 bridging systems engineering and design optimization. Cadence's Dave Pursley argues that working at a higher level of abstraction makes hardware design more effective, more interesting, and more fun. Synopsys' Robert Vamosi considers the challenges surrounding responsible disclo... » read more

Quality Issues Widen
By Ed Sperling - 06 Mar, 2017 - Comments: 0

As the amount of semiconductor content in cars, medical and industrial applications increases, so does the concern about how long these devices will function properly—and what exactly that means. Quality is frequently a fuzzy concept. In mobile phones, problems have ranged from bad antenna placement, which resulted in batteries draining too quickly, to features that take too long to load. ... » read more

The Final Days…Getting To Sign-Off Faster With Calibre
By Mentor, a Siemens Business - 06 Mar, 2017 - Comments: 0

With deadlines looming, the design flow between router output and final tape release can be stressful and frustrating. By combining a focused set of commands into macros, the Calibre YieldEnhancer tool enables designers to create customized, automated flows for engineering change order (ECO) filling, passive device insertion, custom fill to increase densities, jog removal, and via enhancements.... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2024 SMG   |  Terms of Service  |  Privacy Policy