Blog Review: Jan. 6

By Jesse Allen - 06 Jan, 2016 - Comments: 0

Mobile is not just about handsets, but also cloud datacenters and the networking to move data back and forth. Cadence's Paul McLellan takes a look at the future of traditional dataservers with the rise of microservers and the use of FPGA accelerators. Mentor's Jay Gorajia has ideas for how to best leverage manufacturing analytics, but says that care must be taken in deciding which data shoul... » read more

CEO Outlook: 2016

By Ed Sperling - 04 Jan, 2016 - Comments: 1

Semiconductor Engineering talked with 10 CEOs from all sides of the Semiconductor Industry for a high-level view of what to expect this year—good and bad. What follows are excerpts of those conversations, which were compiled over the past month. Scott McGregor, president and CEO of Broadcom "We're going to see more M&A. In the past, you only did deals that made sense strategically or ... » read more

Upcoming Hurdles For The Semiconductor Industry

By Ann Mutschler - 30 Dec, 2015 - Comments: 1

Semiconductor Engineering sat down to discuss upcoming challenges and hurdles to overcome for the semiconductor industry with Vic Kulkarni, senior vice president and general manager, RTL Power Business at Ansys; Chris Rowen, Fellow and CTO, IP Group at Cadence; Subramani Kengeri, vice president, Global Design Solutions at GLOBALFOUNDRIES; Simon Davidmann, CEO of Imperas Software; Michael Buehle... » read more

Blog Review: Dec. 30

By Jesse Allen - 30 Dec, 2015 - Comments: 0

It's been a quiet week on the blog front. If you're looking for a bit of downtime while you enjoy the New Year, we present thoughts on what's happened this year and what may be to come from last week's System-Level Design newsletter: Editor in Chief Ed Sperling finds acquisitions and the leading edge of design defined 2015, but other changes are ahead. Technology Editor Brian Bailey obser... » read more

Defining Sufficient Coverage

By Brian Bailey - 28 Dec, 2015 - Comments: 0

Semiconductor engineering sat down to discuss the definition of sufficiency of coverage as a part of verification closure with Harry Foster, chief scientist at [getentity id="22017" e_name="Mentor Graphics"]; Willard Tu, director of embedded segment marketing for [getentity id="22186" comment="ARM"]; Larry Vivolo was, at the time of this roundtable, senior director of product marketing for [get... » read more

The Week In Review: Design/IoT

By Ed Sperling - 24 Dec, 2015 - Comments: 0

Acquisitions Synopsys acquired Australia's Goanna Software, a security company focused on static code analysis tools for improving code quality. Synopsys said the acquisition is part of its strategy to improve software sign-off, but the acquisition also expands Synopsys' presence in Australia and the Asia/Pacific region. Terms of the deal were not made public. Synopsys has been steadily build... » read more

Blog Review: Dec. 24

By Jesse Allen - 24 Dec, 2015 - Comments: 0

Jeff Ravencraft, the President and COO of USB-IF, sat down for a video interview with Cadence's Jacek Duda to discuss the the role of the organization and what's in the works for USB. Check out the second part, too. Have all the avenues been exhausted in the search for greater layout productivity? Synopsys' Graham Etchells sees no revolutionary technology in the area since CALMA, but highlig... » read more

Bridging Hardware And Software

By Ann Mutschler - 22 Dec, 2015 - Comments: 0

Since the advent of embedded systems there has been a struggle between hardware engineers trying to understand the mindset of their software counterparts, and vice versa. That struggle is alive and well today—and it's costing everyone money. This divide is rife with passion, territoriality and misunderstanding. It has delayed tapeouts, created errors and inefficiencies that take time and e... » read more

The Latest Power Management Techniques For Wearable Devices

By Warren Kurisu - 22 Dec, 2015 - Comments: 0

Wearable devices are popping up everywhere — across all markets. In part one of this wearables white paper series, I wrote about the market and technical factors driving the development and adoption of wearable devices. In part two, we roll up our sleeves and address one of the key requirements for wearable devices. Ah yes, power management. You don’t need super powers to see th... » read more

Why Test Is Changing

By Ann Mutschler - 22 Dec, 2015 - Comments: 0

Test is undergoing a revolution in terms of how it is perceived, how it is performed and where it is done. For years, test was something of an afterthought. It was a separate operation that was done after the design was finished, or it was a self-contained module that had to be characterized for power, heat and electrical effects, but not much else. As more chips find their way into markets ... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

Legacy Process Nodes Going Strong

The critical, and growing, significance of mature node chips and processes.

by Bryon Moyer

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?