6 Key Benefits Of Thermal Testing

By Mentor, a Siemens Business - 23 Nov, 2015 - Comments: 0

This whitepaper discusses the advantages of transient thermal test methods for IC package and thermal interface material (TIM) thermal characterization testing vs steady state methods. These methods assist verification of thermal performance for reliability, support package development & manufacturing decision making, and ensure accurate data sheet values used for selection by engineers. ... » read more

The Week In Review: Design/IoT

By Jesse Allen - 20 Nov, 2015 - Comments: 0

Mergers & Acquisitions On Semiconductor signed a definitive agreement to buy Fairchild Semiconductor for $2.4 billion in cash, combining forces in the power semiconductor market. The deal is the latest in a series of acquisitions and combinations as companies position themselves for the IoT/IoE/IIoT, a world of connected devices that spans from industrial to automotive to smartphones. Comp... » read more

You’re Not Alone

By Srinivas Velivala - 19 Nov, 2015 - Comments: 0

All too often we get caught up in our own work and our own issues, thinking no one else could possibly be having as much trouble as we are. The reality is that many, if not most, of the problems and challenges in IC verification are not unique to one design, one team, or one person. The natural reluctance of people to admit they are struggling with some aspect of their job often keeps them from... » read more

Can Nano-Patterning Save Moore’s Law?

By Mark LaPedus - 19 Nov, 2015 - Comments: 0

For years the academic community has explored a novel technology called selective deposition. Then, more than a year ago, Intel spearheaded an effort to bring the technology from the lab to the fab at 7nm or 5nm. Today, selective deposition is still in R&D, but it is gaining momentum in the industry. With R&D funding from Intel and others, selective deposition, sometimes called ALD-e... » read more

Analog Design And Pattern Matching: A Perfect Pairing

By Ed Sperling - 18 Nov, 2015 - Comments: 0

While automated pattern matching is widely used in the digital IC physical verification process, adoption in the analog space has been much slower. In fact, the very nature of customized analog circuits lends itself ideally to some of the newer physical verification techniques offered by automated pattern matching technology, enabling designers to reduce verification time while still ensuring d... » read more

Blog Review: Nov. 18

By Jesse Allen - 18 Nov, 2015 - Comments: 0

Between anomalies in ancient Egyptian pyramids and algae genetically engineered to attack cancer cells, Ansys' Bill Vandermark covers a wide array of the sciences in his top five picks for the week. Plus, Disney says being a human antenna could have its advantages. Don't write the epitaph for Moore's Law just yet, says Mentor's Michael White. He takes a look at the technical and business cha... » read more

Do Circuits Whisper Or Shout?

By Ann Mutschler - 18 Nov, 2015 - Comments: 0

Maximizing SoC performance and minimizing power is becoming a multi-layered and multi-company challenge that depends on everything from ecosystem feedback and interactions to micro-architectural decisions about whether analog circuits whisper or shout. What used to be a straightforward architectural tradeoff between performance and power has evolved into a much more diffuse and collaborativ... » read more

The Week In Review: Design/IoT

By Jesse Allen - 13 Nov, 2015 - Comments: 0

Predictions Wally Rhines, Mentor Graphics' chairman and CEO, was presented with the Kaufman Award last night for outstanding achievement in electronic design. In his acceptance speech, he plotted the growth of the EDA industry at a consistent 2% of the semiconductor industry for the past couple decades. But he noted that with a shift to system design automation, that number would rise from t... » read more

Ecosystem Vs. Ecosystem

By Ed Sperling - 12 Nov, 2015 - Comments: 0

The massive consolidation that has been underway over the past couple years is about to slow down. Interest rates are expected to increase in the very near future—the Fed has been dropping hints about this for months—ending the era of cheap capital. The cost of borrowing already is creeping up in anticipation of this, and it's happening globally because money lending is a global industry. ... » read more

Overcoming The Design Bottleneck

By Brian Bailey - 12 Nov, 2015 - Comments: 0

SoCs control most advanced electronics these days and functionality, quality, power and security are a combination of both hardware and software. All throughout the development of today's complex systems, the memory hierarchy has remained the same—preserving the notion of a continuous computing paradigm. Today, that decision is leading to performance and power issues. There are several rea... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

Legacy Process Nodes Going Strong

The critical, and growing, significance of mature node chips and processes.

by Bryon Moyer

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

tag: Mentor Graphics

6 Key Benefits Of Thermal Testing

The Week In Review: Design/IoT

You’re Not Alone

Can Nano-Patterning Save Moore’s Law?

Analog Design And Pattern Matching: A Perfect Pairing

Blog Review: Nov. 18

Do Circuits Whisper Or Shout?

The Week In Review: Design/IoT

Ecosystem Vs. Ecosystem

Overcoming The Design Bottleneck