Blog Review: Jan. 11

By Jesse Allen - 11 Jan, 2023 - Comments: 0

Cadence's Veena Parthan explains why in CFD, understanding the consequences of choices regarding the computational mesh is essential for generating high-fidelity simulation results. Synopsys' Chris Clark shares key considerations and questions to factor in when developing solutions for software-defined vehicles that must meet safety, security, reliability, and quality standards. Siemens E... » read more

Screening For Silent Data Errors

By Anne Meixner - 10 Jan, 2023 - Comments: 0

Engineers are beginning to understand the causes of silent data errors (SDEs) and the data center failures they cause, both of which can be reduced by increasing test coverage and boosting inspection on critical layers. Silent data errors are so named because if engineers don’t look for them, then they don’t know they exist. Unlike other kinds of faulty behaviors, these errors also can c... » read more

Shifting Toward Software-Defined Vehicles

By John Koon - 05 Jan, 2023 - Comments: 0

Apple reportedly is developing a software-defined vehicle. But so are Renault, Hyundai, General Motors, and just about everyone else. Some of the benefits of SDVs include increased comfort, convenience, safety, reliability, and remote software and firmware updates. Preventive and predictive maintenance, and remote diagnostics, can be done more conveniently over the air, while vehicle behavio... » read more

Competing V2V Technologies Emerge, Create Confusion

By John Koon - 05 Jan, 2023 - Comments: 0

The battle over vehicle-to-vehicle communications technology has begun, as governments step back to see which of two main competing standards and lots of related technology are best suited for reducing accidents. V2V is an often-discussed wireless communication protocol that enables vehicles to communicate with each other, easing traffic congestion, avoiding accidents, and ultimately improvi... » read more

High-Quality Test And Embedded Analytics For Secure Applications

By Siemens EDA - 05 Jan, 2023 - Comments: 0

Designs for secure applications such as smart cards and those used in the defense industry require security to ensure sensitive data is inaccessible to outside agents. This used to be a somewhat niche requirement and the implementation of custom solutions to meet these specific requirements was common. However, with the explosion within the semiconductor industry of automotive and cyber-phys... » read more

Navigating The Intersection Of Safety And Security

By Jacob Wiltgen - 05 Jan, 2023 - Comments: 0

Automotive IC safety and security continue to be hot topics across the industry, and one phrase you may often hear during discussion is: An automotive IC can be secure without needing to be safe, but an automotive IC cannot be safe without also being secure. Adding a bit of detail to that: An automotive IC which has an incomplete security architecture provides potential attack vectors w... » read more

Blog Review: Jan. 4

By Jesse Allen - 04 Jan, 2023 - Comments: 0

Siemens EDA's Harry Foster investigates the percentage of total IC/ASIC project time spent in verification and increasing engineering headcount, particularly growing demand for verification engineers. Synopsys' Stelios Diamantidis argues that retargeting older chips using AI offers a way to move chip designs between nodes and absorb the market’s excess capacity. Cadence's Paul McLellan ... » read more

Comprehensive S-Parameter Verification Coverage With Analog FastSPICE

By Siemens EDA - 22 Dec, 2022 - Comments: 0

IC design is transforming at an accelerated pace along with fabrication technology. The need to incorporate more functionality has led to denser dies, multi-die chips, stacked 3D ICs and advanced packaging. Furthermore, design technology continues to progress towards supporting higher data rates to address the increasing demand for more and enhanced connectivity. We now must deal with much more... » read more

Designing For Multiple Die

By Ann Mutschler - 21 Dec, 2022 - Comments: 1

Integrating multiple die or chiplets into a package is proving to be very different than putting them on the same die, where everything is developed at the same node using the same foundry process. As designs become more heterogeneous and disaggregated, they need to be modeled, properly floor-planned, verified, and debugged in the context of a system, rather than as individual components. Typi... » read more

Ensuring ESD Protection Verification With Industry-Standard Checks

By Mark Tawfik - 21 Dec, 2022 - Comments: 0

Electronic design automation (EDA) verification of electrostatic discharge (ESD) protection is a complex task. Different integrated circuit (IC) design companies use different ESD protection approaches, different design flows, and different verification tools. To establish a consistent and comprehensive ESD EDA verification flow, the ESD Association (ESDA) provides recommended ESD compliance ch... » read more

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Knowledge Centers
Entities, people and technologies explored

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

Legacy Process Nodes Going Strong

The critical, and growing, significance of mature node chips and processes.

by Bryon Moyer

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

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