IP Design Essentials For Reliability And SoC Integration


IP is integral to every SoC design. The need for ubiquitous connectivity has pushed the threshold for content in SoCs even beyond the tenets of Moore’s Law. Technology scaling has not only enabled the delivery of increased performance and reduced power, but also rich content through the integration of a wide range of IPs such as radio devices, CMOS image sensors, MEMs, etc., into a single ... » read more

And the Winner is…


Semiconductor Engineering now has its first full year under its belt, and I have to say it has been an incredible year. Not only did we exceed a million page views in our first year, but we also got started on the Knowledge Center, an endeavor the likes of which has never been attempted in our industry. It is still very young and has a lot of growing up to do, but it is a wonderful start. We wo... » read more

Photoresist Problems Ahead


As the semiconductor industry begins its ramp to manufacturing at 10nm and below, activity is heating up involving lithography modeling. The goal is to be ready when all the pieces of the puzzle are in place. That includes [gettech id="31045" comment="EUV"], when it finally becomes commercially viable, as well as extending ArF [getkc id="80" comment="lithography"]. When it comes to lithogra... » read more

Will Materials Derail Moore’s Law?


Is Moore’s Law slowing down? Clearly, chipmakers are struggling to keep up with Moore’s Law these days. But one sometimes forgotten and critical technology could easily derail Moore’s Law--materials. In fact, the cost and complexity for electronic materials are increasing at each node. “Chemical and gas commodity procurement spends are growing rapidly due to process complexity and un... » read more

Executive Insight: Lucio Lanza


Lucio Lanza, managing director of Lanza techVentures, a former Intel engineer, and the 2014 Phil Kaufman Award winner, sat down with Semiconductor Engineering to talk about the shrinking number of startups, future investments, new opportunities in EDA, Moore's Law and the Internet of Things. SE: You're one of the last VCs still actively investing in EDA. Why? Lanza: There are several indi... » read more

Why Is My Device Better Than Yours?


Differentiation is becoming a big problem in the semiconductor industry with far-reaching implications that extend well beyond just chips. The debate over the future of [getkc id="74" comment="Moore's Law"] is well known, but it's just one element in a growing list that will make it much harder for chip companies, IP vendors and even software developers to stand out from the pack. And withou... » read more

Which Comes First?


Methodologies in IC design typically follow tools. The tools enable the methodologies, and chipmakers' businesses are built around both of them. That has been the rock-solid foundation for the design and production of chips since well before the impenetrable 1-micron wall. But that approach is falling apart at 28nm, and it will continue to crumble at 16/14nm and 10nm. It simply isn't fast en... » read more

Quantifying IP Entitlement For 14/16nm Technologies


The scaling benefits of [getkc id="74" comment="Moore"s Law"] are being seriously tested at 28nm. It is no longer a given that the cost per gate will go down at leading edge process nodes below 28nm, e.g., 20nm though 14nm. Rising design and manufacturing costs are contributing factors to this trend. Meanwhile, the competing trend of fewer but more complex [getkc id="81" comment="SoC"] (So... » read more

Executive Insight: Lip-Bu Tan


Semiconductor Engineering sat down with [getperson id="11693" comment="Lip-Bu Tan"], president and CEO of [getentity id="22032" e_name ="Cadence"], to discuss his outlook on EDA, Moore’s Law and his strategy for investing in startups around the world. What follows are excerpts of that conversation. SE: What’s worrying you these days? Tan: There are a couple of things. One is the complex... » read more

Collaboration Accelerates Moore’s Law


Moore's Law dictates that the number of transistors in dense, integrated circuits will double approximately every two years. Maintaining this pace of scaling, however, has become increasingly difficult given the ever-increasing complexity inherent with new chip starts. Additionally, the cost of using leading-edge process technology is prohibitively expensive. As a result, collaboration amon... » read more

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