Big Changes At 10nm And Beyond

By Ed Sperling - 16 Apr, 2015 - Comments: 0

The move to 16/14nm finFETs is relatively straightforward. The move to 10nm and 7nm will be quite different. While double patterning with colors at 16/14nm has a rather steep learning curve, reports from chipmakers developing advanced chips is the technology and methodologies are manageable once engineering teams begin working with it. The hardest part is visualizing how different parts will... » read more

Issues And Options At 5nm

By Mark LaPedus - 19 Mar, 2015 - Comments: 0

While the foundries are ramping up their processes for the 16nm/14nm node, vendors are also busy developing technologies for 10nm and beyond. In fact, chipmakers are finalizing their 10nm process offerings, but they are still weighing the technology options for 7nm. And if that isn’t enough, IC makers are beginning to look at the options at 5nm and beyond. Today, chipmakers can see a p... » read more

One-On-One: Dave Hemker

By Mark LaPedus - 19 Feb, 2015 - Comments: 0

Semiconductor Engineering sat down to discuss process technology, transistor trends and other topics with Dave Hemker, senior vice president and chief technology officer at [getentity id="22820" comment="LAM Research"]. SE: On the technology front, the IC industry is undergoing some new and dramatic changes. What are some of those changes? Hemker: We focus on what we call the inflections.... » read more

Balancing On The Color Density Tightrope

By David Abercrombie - 19 Feb, 2015 - Comments: 0

Balancing on wobbly tightropes is something that chip designers get pretty good at. For instance, there is a fine balance between optimizing performance and minimizing leakage in a design layout. Dealing with the new requirements that multi-patterning (MP) introduces into a design flow creates many new tightropes to walk. I tiptoed out on one of the rarely talked about ones in my last article�... » read more

Back To The Future

By Ed Sperling - 02 Feb, 2015 - Comments: 0

The push to the next process node typically has meant that designs get simpler at existing and older nodes because the process technology is more mature and there have been so many chips developed at those nodes—many billions of them—that every possible corner case has been encountered hundreds, if not thousands, of times. That all makes sense in theory, but several key things have chang... » read more

First Look: 10nm

By Ed Sperling - 29 Jan, 2015 - Comments: 6

As the semiconductor industry begins grappling with mass production at 14/16nm process nodes, work is already underway at 10nm. Tools are qualified, IP is characterized, and the first test chips are being produced. It's still too early for production, of course—perhaps three years too early—but there is enough information being collected to draw at least some impressions about just how toug... » read more

Industry Scorecard For 2014

By Brian Bailey - 22 Dec, 2014 - Comments: 0

At the end of last year, Semiconductor Engineering asked the industry about the developments they expected to see in 2014. If you care to refresh your memory, they were categorized under markets, semiconductors and development tools. Now it is time to look back and see how accurate those predictions were and where they fell short. Part one addressed the market and semiconductor areas and in thi... » read more

Multiple Patterns, Multiple Trade-Offs

By David Abercrombie - 11 Dec, 2014 - Comments: 0

As the saying goes, “There is no such thing as a free lunch.” That is a reality that chip designers have had to live by from the beginning. From the advent of the first design rule, it was clear that you couldn’t just do anything you wanted. In the end, everything comes down to trade-offs. Whether it’s area, speed, leakage, noise sensitivity, or drive current, doing something to impr... » read more

What’s The Other Guy Doing?

By Ed Sperling - 11 Dec, 2014 - Comments: 0

Competition is generally a good thing. It improves service, promotes innovation, forces efficiencies and price cuts where necessary, and it ratchets up the pressure to bring products and services to market faster. Those who can't keep up usually lose market share, and eventually the business sector consolidates until something comes along to disrupt it. That cycle has been repeated in every ... » read more

Design Rules Explode At New Nodes

By Ed Sperling - 17 Nov, 2014 - Comments: 0

Semiconductor Engineering sat down changing design rules with Sergey Shumarayev, senior director of custom IP design at Altera; Luigi Capodieci, R&D fellow at [getentity id="22819" comment="GlobalFoundries"]; Michael White, director of product marketing for Calibre Physical Verification at [getentity id="22017" e_name="Mentor Graphics"], and Coby Zelnik, CEO of [getentity id="22478" e_name=... » read more

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tag: multi patterning