Chip Industry Week In Review

By The SE Staff - 12 Jul, 2024 - Comments: 0

The U.S. Department of Commerce issued a notice of intent  to fund new R&D activities to establish and accelerate domestic advanced packaging capacity. CHIPS for America expects to award up to $1.6 billion in funding innovation across five R&D areas, as outlined in the vision for the National Advanced Packaging Manufacturing Program (NAPMP), with about $150 million per award in each... » read more

CHIPS For America’s National Semiconductor Technology Center (NSTC) Program

By Barry Pangrle - 03 Jul, 2024 - Comments: 0

At this year’s Design Automation Conference, Jay Lewis, director of CHIPS for America National Semiconductor Technology Center (NSTC) Program, gave a presentation on the status and direction of the Center, its priorities for this year and how the NSTC can change the long-term trajectory for innovation. Fig. 1: Dr. Jay Lewis, director of NSTC Program, CHIPS R&D Office at the Dept. o... » read more

Chip Industry Week In Review

By The SE Staff - 28 Jun, 2024 - Comments: 0

The Design Automation Conference morphed into the Chips to Systems Conference, reflecting an industry shift from monolithic SoCs to assemblies of chiplets in various flavors of advanced packaging. The change drew a slew of students and a resurgent buzz, fueled by discussions about heterogeneous integration, reliability, and ways to leverage AI/ML to speed up design and verification processes. ... » read more

Chip Industry Week In Review

By The SE Staff - 31 May, 2024 - Comments: 0

JEDEC and the Open Compute Project rolled out a new set of guidelines for standardizing chiplet characterization details, such as thermal properties, physical and mechanical requirements, and behavior specs. Those details have been a sticking point for commercial chiplets, because without them it's not possible to choose the best chiplet for a particular application or workload. The guidelines ... » read more

Chip Industry Week In Review

By The SE Staff - 22 Nov, 2023 - Comments: 0

By Jesse Allen, Susan Rambo, and Liz Allan The U.S. government will invest about $3 billion for the National Advanced Packaging Manufacturing Program (NAPMP), including an advanced packaging piloting facility to help U.S. manufacturers adopt new technology and workforce training programs. It also will provide funding for projects concentrating on materials and substrates; equipment, tools, ... » read more

Chip Industry Week In Review

By The SE Staff - 13 Oct, 2023 - Comments: 0

By Liz Allan, Jesse Allen, and Karen Heyman. Canon uncorked a nanoimprint lithography system, which the company said will be useful down to about the 5nm node. Unlike traditional lithography equipment, which projects a pattern onto a resist, nanoimprint directly transfers images onto substrates using a master stamp patterned by an e-beam system. The technology has a number of limitations and... » read more

Week In Review: Semiconductor Manufacturing, Test

By Susan Rambo - 23 Jun, 2023 - Comments: 0

The CHIPS for America team at the U.S. Department of Commerce named the selection committee who will select board members for the nonprofit entity that will likely be managing the National Semiconductor Technology Center (NSTC). Members include John Hennessy, chairman of Alphabet; Jason Matheny, president and CEO of the RAND Corporation; Don Rosenberg, fellow in residence at UCSD’s School of ... » read more

NIST Releases “Vision And Strategy for the National Semiconductor Technology Center”

By Technical Paper Link - 05 May, 2023 - Comments: 0

A paper titled "A Vision and Strategy for the National Semiconductor Technology Center" was published by the U.S. Department of Commerce’s National Institute of Standards and Technology (NIST). The paper describes how the NSTC (National Semiconductor Technology Center) will develop and safeguard chips and technologies of the future. “The NSTC will be an ambitious public-private consortiu... » read more

Week In Review: Design, Low Power

By Jesse Allen - 28 Apr, 2023 - Comments: 0

The National Institute of Standards and Technology (NIST) outlined its plan for a National Semiconductor Technology Center (NSTC) to be created using a share of the $11 billion in funds from the CHIPS Act marked for research and development. While a large portion of the CHIPS Act investment is set to boost U.S. fabs and manufacturing capabilities, the NSTC aims to also support the design side, ... » read more

Week In Review: Design, Low Power

By Jesse Allen - 13 Jan, 2023 - Comments: 0

With funding from the Semiconductor Research Corporation, a group of 10 universities is banding together to create the Processing with Intelligent Storage and Memory center, or PRISM, led by University of California San Diego. The $50.5 million PRISM center will focus on four different themes: novel memory and storage devices and circuits; next generation architectures; systems and software; an... » read more

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tag: NSTC

Chip Industry Week In Review

CHIPS For America’s National Semiconductor Technology Center (NSTC) Program

Chip Industry Week In Review

Chip Industry Week In Review

Chip Industry Week In Review

Chip Industry Week In Review

Week In Review: Semiconductor Manufacturing, Test

NIST Releases “Vision And Strategy for the National Semiconductor Technology Center”

Week In Review: Design, Low Power

Week In Review: Design, Low Power

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