tag: Nvidia

Blog Review: Aug. 4
By Jesse Allen - 04 Aug, 2021 - Comments: 0

Cadence's Paul McLellan listens in as industry luminaries celebrate 50 years of the microprocessor with a discussion on major challenges to the growth of microprocessors, inflection points over the last 50 years, and predictions for the next 25. Siemens EDA's Vladimir Kirichenko warns that designing electrical and thermal systems separately may lead to various problems such as late design ch... » read more

Week In Review: Auto, Security, Pervasive Computing
By SE Staff - 30 Jul, 2021 - Comments: 0

Automotive SGS-TÜV Saar certified that Cadence’s Tensilica Xtensa processors with FlexLock meets the ISO 26262:2018 standard to ASIL-D level. The new FlexLock feature is key to the certification because it supports lockstep, a fault-tolerant method that runs the same operation on two cores at the same time and then compares the output. Any difference in the output can be examined for issues... » read more

Blog Review: July 14
By Jesse Allen - 14 Jul, 2021 - Comments: 0

Siemens EDA's Wei-Lii Tan considers the tradeoffs when running library characterization in the cloud and how to think about running CPUs in parallel, the cost of throughput, and runtime reductions. A Synopsys writer checks out the reduced blanking feature in HDMI 2.1, which can help reduce the transmission rate while keeping the resolution and refresh rate intact for higher resolution displa... » read more

Week In Review: Design, Low Power
By Jesse Allen - 09 Jul, 2021 - Comments: 0

Tools Aldec extended its TySOM family of embedded prototyping boards with the introduction of TySOM-M-MPFS250, the first in a planned series to feature a Microchip PolarFire SoC FPGA MPFS250T-FCG1152 and to have dual FMC connectivity. The board contains 16Gb FPGA DDR4 x32, 16Gb MSS DDR4 x36 with ECC, eMMC, SPI Flash memory, 64 Kb EEPROM and a microSD card socket. The PolarFire SoC is a five-st... » read more

Week In Review: Auto, Security, Pervasive Computing
By SE Staff - 09 Jul, 2021 - Comments: 0

Pervasive computing — IoT, edge, cloud, data center, and back The IoT designer Deed designed a screenless health monitor, worn on the wrist, that uses IoT (Internet of Things) building blocks from Infineon Technologies. The Get bracelet interprets hand gestures for making payments, picking up phone calls, turning up or down audio, while it also takes health data and biometrics. The system us... » read more

Blog Review: July 7
By Jesse Allen - 07 Jul, 2021 - Comments: 0

Cadence's Sangeeta Soni provides a primer on the PIPE SerDes architecture and some of the changes that can introduce verification challenges for SerDes compliant PHY and MAC devices. Siemens EDA's Chris Spear demystifies the $cast() method in SystemVerilog, which checks values at runtime rather than compile time, and gives some examples of when it is useful. Synopsys' Chris Clark warns th... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 02 Jul, 2021 - Comments: 0

Chipmakers and OEMs More delays and product woes at Intel. “INTC disclosed that it is delaying the launch of its next-generation Xeon server processor Sapphire Rapids (10nm) from the end of this year to 1Q22 due to additional validation needed for the chip,” said John Vinh, an analyst at KeyBanc, in a research note. “Production is expected to begin in 1Q22, with the ramp expected to begi... » read more

Week In Review: Design, Low Power
By Jesse Allen - 02 Jul, 2021 - Comments: 0

Tools Imperas and Valtrix inked a multi-year distribution and support agreement that makes Imperas simulation technology and RISC-V reference models available pre-integrated within Valtrix STING for RISC-V processor verification. The combined solution covers the full RISC-V specification for user, privilege, and debug modes, including all ratified standard extensions, and the near ratified (st... » read more

Architectural Considerations For AI
By Brian Bailey - 24 Jun, 2021 - Comments: 2

Custom chips, labeled as artificial intelligence (AI) or machine learning (ML), are appearing on a weekly basis, each claiming to be 10X faster than existing devices or consume 1/10 the power. Whether that is enough to dethrone existing architectures, such as GPUs and FPGAs, or whether they will survive alongside those architectures isn't clear yet. The problem, or the opportunity, is that t... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 18 Jun, 2021 - Comments: 0

Fab tools TEL plans to ship its leading-edge coater/developer system to the joint Imec-ASML research lab, which is working on high-NA extreme ultraviolet (EUV) lithography. The equipment will be integrated with the EXE:5000, ASML’s next-generation high-NA EUV lithography system. The 0.55 numerical aperture (NA) tool is slated to be operational in 2023. Today's EUV is in production, but there... » read more

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