Blog Review: March 15


Siemens EDA's Dan Yu finds that high-quality, well-connected mass data are crucial to the success of applying machine learning to verification and recommends teams pivot to a data-centric workflow. Synopsys' Shankar Krishnamoorthy suggests that deploying AI-driven chip design and verification can free teams from iterative work, letting them focus instead on product differentiation and PPA en... » read more

Blog Review: March 8


Synopsys' Rahul Thukral and Bhavana Chaurasia find that embedded MRAM is undergoing an uplift in utilization for low-power, advanced-node SoCs thanks to its high capacity, high density, and ability to scale to lower geometries. Siemens EDA's Chris Spear dives into the UVM Factory with a look at the  SystemVerilog Object-Oriented Programming concepts behind the factory. Cadence's Veena Pa... » read more

Standards: The Next Step For Silicon Photonics


Testing silicon photonics is becoming more critical and more complicated as the technology is used in new applications ranging from medicine to cryptography, lidar, and quantum computing, but how to do that in a way that is both consistent and predictable is still unresolved. For the past three decades, photonics largely has been an enabler for high-speed communications, a lucrative market t... » read more

Blog Review: March 1


Siemens EDA's Chris Spear explains the UVM Factory and how it can facilitate collaboration by enabling injection of new features without affecting your team. Cadence's Paul McLellan looks at efforts to ensure chiplets from different companies work together, particularly when the creating companies didn't pre-plan for those specific chiplets to work together, as well as the problems of failur... » read more

Blog Review: Feb. 22


Siemens EDA's Harry Foster observes that the FPGA market continues to go through a similar complexity curve that the IC/ASIC market experienced in the early and mid-2000 timeframe. Synopsys' Mitch Heins explores the benefits of heterogeneous integration of lasers and active gain elements in a silicon-based photonic IC, including reduced system costs, size, weight, and power along with improv... » read more

Week In Review: Design, Low Power


It’s earnings season. Arm, Cadence, Synopsys, Siemens (consolidated), Rambus, and Renesas reported quarterly results over the past couple weeks. All posted year-over-year revenue growth, despite an overall challenging macroeconomic climate. A roundup of all the chip industry earnings reports from the past several weeks can be found here. The edge computing market is projected to jump to al... » read more

Blog Review: Feb. 8


Cadence's Sanjeet Kumar points to key changes and optimizations that are done for USB3 Gen T compared to USB3 Gen X tunneling in order to minimize tunnel overhead and maximize USB3 throughput. Siemens EDA's Harry Foster considers the effectiveness of IC and ASIC verification by looking at schedule overruns, number of required spins, and classification of functional bugs. Synopsys' Chris C... » read more

Solving Problems With The IoT


The Internet of Things, a term once applied to almost any "smart" gadget connected to the Internet, is becoming more useful, more complex, and more of a security risk as the value of data continues to grow and more people depend on IoT technology. In the decades since the concept was first introduced, IoT devices have become so ubiquitous that applications cover practically every consumer, c... » read more

Improving Performance And Power With HBM3


HBM3 swings open the door to significantly faster data movement between memory and processors, reducing the power it takes to send and receive signals and boosting the performance of systems where high data throughput is required. But using this memory is expensive and complicated, and that likely will continue to be the case in the short term. High Bandwidth Memory 3 (HBM3) is the most rece... » read more

CXL Picks Up Steam In Data Centers


CXL is gaining traction inside large data centers as a way of boosting utilization of different compute elements, such as memories and accelerators, while minimizing the need for additional racks of servers. But the standard is being extended and modified so quickly that it is difficult to keep up with all the changes, each of which needs to be verified and validated across a growing swath of h... » read more

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