Challenges And Solutions In Chip Design


Ansys is hosting IDEAS Digital Forum 2022, a no-cost virtual event that brings together industry executives and technical design experts to discuss the latest in EDA for Semiconductors, Electronics, and Photonics. The December 6th on-line event starts with Keynote addresses from Raja Koduri from Intel, Pankaj Kukkal from Qualcomm, and insights into the metaverse from DP Prakash with start-up... » read more

Chip Industry’s Technical Paper Roundup: Nov. 21


New technical papers added to Semiconductor Engineering’s library this week. [table id=65 /] » read more

Lithography Modeling: Data Augmentation Framework


A new technical paper titled "An Adversarial Active Sampling-based Data Augmentation Framework for Manufacturable Chip Design" was published by researchers at the University of Texas at Austin, Nvidia, and the California Institute of Technology. Abstract: "Lithography modeling is a crucial problem in chip design to ensure a chip design mask is manufacturable. It requires rigorous simulation... » read more

Week In Review: Semiconductor Manufacturing, Test


U.S. President Joe Biden appears ready to increase pressure on Japan and the Netherlands to help block the flow of advanced chip technology to China, where it can be used to develop cutting-edge weapons. "You will see Japan and Netherlands follow our lead," U.S. Commerce Secretary Gina Raimondo told CNBC. Japan plans to budget ¥350 billion ($2.38 billion) in a research collaboration with th... » read more

Blog Review: Nov. 9


Cadence's Claire Ying finds that the latest update to CXL, which introduced memory-centric fabric architectures and expanded capabilities for improving scale and optimizing resource utilization, could change how some of the world’s largest data centers and fastest supercomputers are built. Synopsys' Gervais Fong and Morten Christiansen examine the latest updates in the USB 80Gbps specifica... » read more

Chip Design Shifts As Fundamental Laws Run Out Of Steam


Dennard scaling is gone, Amdahl's Law is reaching its limit, and Moore's Law is becoming difficult and expensive to follow, particularly as power and performance benefits diminish. And while none of that has reduced opportunities for much faster, lower-power chips, it has significantly shifted the dynamics for their design and manufacturing. Rather than just different process nodes and half ... » read more

Week In Review: Semiconductor Manufacturing, Test


Fallout from the new U.S. export controls continues. Under new regulations, companies looking to supply Chinese chipmakers with advanced manufacturing equipment (<14nm) must first obtain a license from the U.S. Department of Commerce. In addition, U.S. persons (citizens and permanent residents) are barred from supporting China’s advanced chip development or production without a license. ... » read more

Week In Review: Design, Low Power


Tools and IP Electronic system design revenue hit a record $3.75 billion in the second quarter, according to a report from ESD Alliance, a SEMI Technology Community. That number represents a 17.5% year-over-year increase. Walden C. Rhines, the report’s executive sponsor, said it was the largest such jump in over a decade and that all product categories and geographic regions recorded second ... » read more

Bespoke Silicon Rattles Chip Design Ecosystem


Bespoke silicon developers are shaking up relationships, priorities, and methodologies across the semiconductor industry, creating demand for skills that cross traditional boundaries, and driving new business models that leverage these enormous investments. Bespoke silicon designers today are a rare breed, capable of understanding the unique requirements of a specific domain, as well as a gr... » read more

IC Architectures Shift As OEMs Narrow Their Focus


Diminishing returns from process scaling, coupled with pervasive connectedness and an exponential increase in data, are driving broad changes in how chips are designed, what they're expected to do, and how quickly they're supposed to do it. In the past, tradeoffs between performance, power, and cost were defined mostly by large OEMs within the confines of an industry-wide scaling roadmap. Ch... » read more

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