Wrong Verification Revolution Offered


SoC design traditionally has been an ad-hoc process, with implementation occurring at the register transfer level. This is where verification starts, and after the blocks have been verified, it becomes an iterative process of integration and verification that continues until the complete system has been assembled. But today, this methodology has at least two major problems, which were addres... » read more

Week 49: Are We There Yet?


When I was a little kid my parents would pack me and my sister into the car and drive to the Mediterranean for our summer camping vacation. It was quite a haul from our home on the west side of Germany near the border with Belgium to the south of France, and as is true of any long car trip, the last stretch was the hardest. After hours in the backseat, my sister and I would be craning our necks... » read more

5 Issues Under The Foundry Radar


In the foundry business, the leading-edge segment grabs most, if not all, of the headlines. Foundry vendors, of course, are ramping up 16nm/14nm finFET processes, with 10nm and 7nm in R&D. The leading-edge foundry business is sizable, but it’s not the only thing going on in the competitive arena. In fact, there are battles taking place in many other foundry segments, such as 2.5D/3D packag... » read more

The Week In Review: Manufacturing


Intel is in talks to buy Altera, according to The Wall Street Journal. If a deal is reached, Intel would enter the FPGA market amid a slowdown in its core processors business. Intel would also secure its largest foundry customer in Altera. For years, Altera’s sole foundry was TSMC. Then, not long ago, Altera selected Intel as its foundry partner for 14nm. TSMC still handles 20nm and above wor... » read more

TSMC: Rise of the “Phantom Node”


TSMC’s financial results for Q4 of 2014 and for the full year were announced in January with TSMC stating it again had achieved record sales and profits. The fourth quarter saw TSMC set records for revenue, earnings per share and cash balance. TSMC made bold predictions last year about 20nm revenue by Q4 2014, and it appears it has met them (see 28nm Powers TSMC Forward, Part Deux). TSMC repo... » read more

The Week In Review: Manufacturing


For years, Altera’s sole foundry was TSMC. Then, not long ago, Altera selected Intel as its foundry partner for 14nm. TSMC still handles 20nm and above work for Altera. Now, Altera will soon select a foundry partner for 10nm. “Altera will make a decision on which foundry partner it will choose for 10nm finFET at the end of 1Q15, noting it will decide between Intel and TSMC,” said John Vin... » read more

Unraveling The Mysteries At IEDM


In some respects, the 2014 IEEE International Electron Devices Meeting (IEDM) was no different than past events. The event, held this week in San Francisco, included the usual and dizzying array of tutorials, sessions, papers and panels. On the leading-edge CMOS front, for example, the topics included [getkc id="82" kc_name="2.5D"]/[getkc id="42" kc_name="3D IC"] chips, III-V materials, [getkc ... » read more

Is The Stacked Die Ecosystem Stagnating?


It is now widely agreed that not much has been happening in terms of adoption for 2.5D interposer and 3D ICs. “It seems like everyone is still at the starting line waiting for the race to begin," said Javier DeLaCruz, senior director of engineering of [getentity id="22242" e_name="eSilicon"]. "Interposer assembly and IP availability for effectively using the [getkc id="82" comment="2.5D IC... » read more

New Machine Tops The Green500 List


The Green500 has released its latest list of the top 500 most energy efficient Supercomputers and there is a new machine, L-CSC from the Helmholtz Center that is the first supercomputer to surpass the 5 GigaFLOPS/watt barrier. The machine is yet another heterogeneous system and is based on AMD FirePro S9150 GPU accelerators and Intel Xeon E5-2690v2 10C 3GHz processors. IBM and NVIDIA aren’... » read more

Blog Review: Nov. 12


ARM's Eoin McCann provides a primer to software-defined networking, which uses a higher level of abstraction to create a centralized controller. This is a new twist on networking—with a bit of deja vu thrown in. Mentor's Matthew Ballance points to a perfect storm for verification—shrinking features, more layers and more embedded processors. He has some tips for how to deal with all of t... » read more

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