Can Intel Dethrone The Foundry Giants?

By Mark LaPedus - 12 Dec, 2013 - Comments: 3

The leading-edge foundry business isn’t for the faint of heart. It requires deep pockets and sound technology to keep pace in the chip-scaling race. And despite pouring billions of dollars into new fabs and processes, foundries are competing for fewer customers at each node. Given the difficult business conditions, only a handful of vendors can afford to compete in the high-end foundry bus... » read more

Blog Review: Dec. 11

By Ed Sperling - 11 Dec, 2013 - Comments: 0

Synopsys’ Brent Gregory has developed a career growth checklist for computer science majors. They should hang this in the hallway at universities. Cadence’s Brian Fuller interviews Saar Drimer, a UK hardware engineer who has been experimenting with odd-shaped PCBs. According to Drimer, 45-degree angles aren’t always optimal. But what happens to all the expensive tools everyone has bee... » read more

Fastest Computers On The Planet

By Barry Pangrle - 05 Dec, 2013 - Comments: 0

The latest Green500 list (Excel spreadsheet here) was just released at the end of last month and heterogeneous systems now own the top of the list. The Top 10 systems all use a combination of Intel Xeon (mostly E5) processors paired with NVIDIA K20s. There are now 6 systems listed that have broken the 3,000 MFLOPS/W barrier and TSUBAME-KFC, belonging to the Tokyo Institute of Technology’s GSI... » read more

The Week In Review: Manufacturing & Design

By Mark LaPedus - 22 Nov, 2013 - Comments: 0

Intel is getting serious about the foundry business. “Intel CEO Brian Krzanich is making some waves. This is not because Intel is becoming more market driven, but that Intel will open its foundry to ‘any’ company able to utilize the company's leading-edge technology. It’s very refreshing to see Intel make this move and could have important implications for the industry. Based on Intel... » read more

ARMing Intel

By Mark LaPedus - 14 Nov, 2013 - Comments: 0

For some time, the industry has kept a close eye on Intel’s fledging foundry business. The question is whether Intel will merely dabble in the foundry business or become a major player. The answer? It’s still too early to tell. Not long ago, Intel entered the foundry business and announced a smattering of small and niche-oriented customers, such as Achronix, Netronome and Tabula. Micro... » read more

Blog Review: Nov. 13

By Ed Sperling - 13 Nov, 2013 - Comments: 0

Synopsys’ Brent Gregory digs into optimal paths—in this case between the bakery, the library and another store. This is the classic traveling salesman equation, but with a large sales staff and lots of stops. Mentor’s Michael Ford points to the gap between supply-chain and shop-floor management solutions. This is yet another example of thinking outside the package—and maybe the enti... » read more

ARM Cortex-A53, UPF & FD-SOI

By Barry Pangrle - 07 Nov, 2013 - Comments: 0

The IEEE Standards Association Symposium on Electronic Design Automation (EDA) Interoperability was held on Oct. 24. I found the first session, Interoperability Challenges: Power Management in Silicon, with presentations by Erich Marschner of Mentor Graphics and Stuart Riches and Adnan Khan (both from ARM) to be particularly interesting. Earlier this year, the IEEE announced a new version of UP... » read more

Verification 2.0: From Tool To Flow

By Frank Schirrmeister - 23 Oct, 2013 - Comments: 0

Recently, Cadence held a System-to-Silicon Verification Summit at which companies like Broadcom, Zenverge, NVIDIA, and Ambarella shared their experiences and visions for verification. In one of the keynotes, Brian Bailey shared his vision of how verification would transition from tools to flows. Brian’s presentation was quite insightful. He started with a brief status of where we are curre... » read more

Blog Review: Oct. 16

By Ed Sperling - 16 Oct, 2013 - Comments: 0

Cadence’s Richard Goering follows Si2’s move into SPICE modeling following the acquisition of the Compact Model Council. Combining standards groups is a growing trend these days. Mentor’s Colin Walls points to the demise of reset buttons. You can always trip a circuit breaker, and usually turn off a device by pulling out the battery, but a reset button is simpler. Where did they go? ... » read more

On-Chip MCUs Excel At Power Management

By Ann Mutschler - 10 Oct, 2013 - Comments: 0

By Ann Steffora Mutschler When it comes to supplying power to an SoC, there is an increasing trend to make it more intelligent—how to control it more accurately, how it is monitored and how it communicates with different aspects of the chip. Traditional power supply models with analog supplies have less of this control, so a number of engineering teams are considering the use of on-chip m... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

Legacy Process Nodes Going Strong

The critical, and growing, significance of mature node chips and processes.

by Bryon Moyer

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?