The Week In Review: System-Level Design


Synopsys rolled out new non-volatile memory IP that cuts power by 90% and reduces area in half. The company said it accomplished this feat with a single-bit read capability, which can drop read operation down to 0.9 volts and peak current to less than 10 microamps during erase and programming. The target of the ultra-low power IP is RFID and near-field computing ICs. Mentor Graphics posted p... » read more

From Design to Test: Developing High-Reliability MTP NVM


In developing high-quality and reliable MTP NVM, NVM IP providers must account for design and architectural considerations as well as comprehensive silicon testing. To help system-on-chip (SoC) designers select the highest reliability NVM IP, this white paper will review the key considerations involved in the entire process from design to test, including: key reliability specifications; designi... » read more

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