How And Where ML Is Being Used In IC Manufacturing

By Mark LaPedus - 01 Apr, 2020 - Comments: 0

Semiconductor Engineering sat down to discuss the issues and challenges with machine learning in semiconductor manufacturing with Kurt Ronse, director of the advanced lithography program at Imec; Yudong Hao, senior director of marketing at Onto Innovation; Romain Roux, data scientist at Mycronic; and Aki Fujimura, chief executive of D2S. What follows are excerpts of that conversation. Part one ... » read more

3D NAND Metrology Challenges Growing

By Mark LaPedus - 09 Apr, 2019 - Comments: 8

3D NAND vendors face several challenges to scale their devices to the next level, but one manufacturing technology stands out as much more difficult at each turn—metrology. Metrology, the art of measuring and characterizing structures, is used to pinpoint problems and ensure yields for all chip types. In the case of 3D NAND, the metrology tools are becoming more expensive at each iteration... » read more

Finding Defects In Chips With Machine Learning

By Mark LaPedus - 12 Mar, 2019 - Comments: 7

Chipmakers are using more and different traditional tool types than ever to find killer defects in advanced chips, but they are also turning to complementary solutions like advanced forms of machine learning to help solve the problem. A subset of artificial intelligence (AI), machine learning has been used in computing and other fields for decades. In fact, early forms of machine learning ha... » read more

Inside Inspection And Metrology

By Mark LaPedus - 18 Dec, 2015 - Comments: 0

Semiconductor Engineering sat down to talk about inspection, metrology and other issues with Mehdi Vaez-Iravani, vice president of advanced imaging technologies at Applied Materials. What follows are excerpts of that conversation. SE: Today, the industry is working on a new range of complex architectures, such as 3D NAND and finFETs. For these technologies, the industry is clearly struggling... » read more

Getting Over Overlay

By Mark LaPedus - 18 Jun, 2015 - Comments: 0

Chipmakers continue to migrate to the next node, but there are signs that traditional IC scaling is slowing down. So what’s causing the slowdown? Or for that matter, what could ultimately undo [getkc id="74" comment="Moore's Law"]? It could be a combination of factors. To be sure, IC design costs and complexity are soaring at each node. Scaling challenges are also playing a role. And ov... » read more

Waiting For Next-Gen Metrology

By Mark LaPedus - 21 May, 2015 - Comments: 0

Chipmakers continue to march down the various process nodes, but the industry will require new breakthroughs to extend IC scaling at 10nm and beyond. In fact, the industry will require innovations in at least two main areas—patterning and the [getkc id="36" comment="Interconnect"]. There are other areas of concern, but one technology is quickly rising near the top of the list—metrology.... » read more

Flash Dance For Inspection And Metrology

By Mark LaPedus - 16 Apr, 2015 - Comments: 0

Chipmakers are moving from planar technology to an assortment of 3D-like architectures, such as 3D NAND and finFETs For these devices, chipmakers face a multitude of challenges in the fab. But one surprising and oft-forgotten technology is emerging as perhaps the biggest challenge in both logic and memory—process control. Process control includes metrology and wafer inspection. Metrolo... » read more

Searching For 3D Metrology

By Mark LaPedus - 19 Mar, 2015 - Comments: 3

In the previous decade, chipmakers made a bold but necessary decision to select the [getkc id="185" kc_name="finFET"] as the next transistor architecture for the IC industry. Over time, though, chipmakers discovered that the finFET would present some challenges in the fab. Deposition, etch and lithography were the obvious hurdles, but chipmakers also saw a big gap in metrology. In fact,... » read more

Challenges Mount In Inspection And Metrology

By Mark LaPedus - 12 Dec, 2013 - Comments: 0

Chipmakers are moving full speed ahead toward smaller process nodes, thereby driving up the costs and complexities in chip manufacturing. The migrations also are putting enormous stress on nearly all points of the fab flow, including a critical but unsung part of the business—process control. Process control involves 20 or so different segments in the inspection and metrology arena. Genera... » read more

Waiting For 3D Metrology

By Mark LaPedus - 18 Apr, 2013 - Comments: 0

By Mark LaPedus Over the years, suppliers of metrology equipment have managed to meet the requirements for conventional planar chips. But tool vendors now find themselves behind in the emerging 3D chip era, prompting the urgent need for a new class of 3D metrology gear. 3D is a catch-all phrase that includes a range of new architectures, such as finFET transistors, 3D NAND and stacked-die ... » read more

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