Finding Defects In Chips With Machine Learning

Better algorithms and more data could bolster adoption, particularly at advanced nodes.


Chipmakers are using more and different traditional tool types than ever to find killer defects in advanced chips, but they are also turning to complementary solutions like advanced forms of machine learning to help solve the problem.

A subset of artificial intelligence (AI), machine learning has been used in computing and other fields for decades. In fact, early forms of machine learning have been used in metrology and inspection in fabs since the 1990s to pinpoint defects in chips and even predict problems using pattern-matching techniques. Machine learning isn’t a tool or equipment type per se, but rather it’s a set of software algorithms used by the system to help find defects. Now the industry is either exploring or starting to use systems with more advanced machine learning algorithms based on larger data sets. This, in turn, supposedly speeds up the cycles of learning.

This will not replace the traditional methods, at least in the short term. So far, more advanced forms of machine learning are not widely deployed throughout the fab, and some gaps remain. But the industry is making progress as it strives to solve the daunting challenges in defect detection.

In today’s fabs, chipmakers use various inspection and metrology systems to find defects in chips. Inspection is the science of finding defects, while metrology is the art of measuring structures. Both technologies are used to locate problems in devices, and they help ensure yields in the fab.

Still, at each node, the devices and structures are becoming smaller. In some cases, the structures are well below 1 angstrom, which is equal to 0.1nm. Finding defects at that scale is far more difficult and costly.

Tools do exist for that purpose, and many incorporate some level of machine learning. So far, utilization has been spotty for more advanced forms of machine learning. But as advanced machine learning algorithms are developed for defect detection, this could change. At issue is whether enough good data is available, which would allow manufacturers and packaging houses to locate defects in a fast and accurate manner. If the data sets are inadequate, a system can generate questionable or even inaccurate results.

In either case, defect detection with machine learning will continue to be used for some apps in the fab. As the technology advances, though, it might see broader use in the industry.

“Machine learning is an answer for some metrology problems.” said David Fried, vice president of computational products at Coventor, a Lam Research Company. “There will be more and more problems where that solution becomes applicable. It’s not a panacea. It’s not the right answer for everything.”

Nonetheless, the industry continues to improve the technology. Here’s are some of the latest efforts in this arena:

  • Imec and Nova developed a way to predict electrical performance in chips using machine learning. Separately, GlobalFoundries and Nova developed a similar technology.
  • Imec devised a CD-SEM with deep learning.
  • ASML and SK Hynix improved optical proximity correction (OPC) accuracy using the technology.
  • IBM and USC devised a neural network for improved defect detection.

Inspection/metrology challenges
Today’s 300mm fabs are automated plants that process wafers in a step-by-step flow using a variety of equipment. An advanced logic process could have from 600 to 1,000 steps, or more. At different stages, a chip undergoes various metrology and inspection steps.

These steps are critical. A missed defect can impact yield in the fab, or escape into the field and cause a failure at a later date.

At 28nm and above, metrology and inspection are straightforward. For example, a logic transistor is a planar with large features. With relative ease, chipmakers can measure and inspect devices. This is more difficult with finFETs at 16/14nm. But as chip designs migrate to 10nm/7nm and beyond, the structures are smaller and harder to measure. The same is true for the latest DRAMs and NAND devices.

Both finFETs and memory devices are 3D-like in nature. So in the case of metrology, the tools must not only obtain 2D measurements in structures, but they must also obtain them in three dimensions in a cost-effective manner.

“You need to know what the shape looks like. Then, you need to be able to see things like materials composition, so you know that it’s uniform. A lot of the defects are underneath the layers,” said Dan Hutcheson, chief executive of VLSI Research.

Indeed, defect detection is challenging. For example, so-called latent defects may crop up in devices. These defects do not appear when a device is shipped, but they are somehow activated in the field and could end up in a system. “Sometimes, it takes three or four different things to happen all at once for a defect to actually be a killer defect in a particular location,” Hutcheson said.

Compounding the challenges, no one metrology and inspection tool type can find all defects. For example, more than a dozen metrology tool types are required to characterize finFETs in the fab.

Ideally, chip manufacturers want tools with better sensitivities with higher throughputs at lower costs. “What they need is to take much larger sample sizes, so they need more productivity in the tools,” Hutcheson said.

Going forward, suppliers of metrology and inspection gear will continue to improve their systems. Meanwhile, in a parallel path, metrology/inspection vendors continue to develop machine learning techniques using neural networks. In neural networks, the system crunches data and identifies patterns. It matches certain patterns and learns which of those attributes are important.

Neural networks consist of multiple neurons and synapses. A neuron could consist of a memory cell with logic gates. The neurons are daisy-chained and connected with a link called a synapse.

Neural networks function by calculating matrix products and sums. It consists of three layers—input, hidden, and output.


Fig. 1: DNNs are largely multiply-accumulate. Source: Mythic

In operation, there might have a hundred different defect types. Each defect type is imaged and the information is put into the input layer in the network.

Then, each defect type is moved into an individual neuron in one of the hidden layers (layer 1) and assigned a weight. In another hidden layer (layer 2) the defects might be sub-divided into different classes, such as edge, protrusion, and others. They are also assigned weights.

In the fab, a system detects a defect. In each layer, the neuron reacts to the data. Using a weighted system of connections, one neuron in the network reacts the strongest when it senses a matching pattern. The answer is revealed in the output layer.

Machine learning is used by search engine and social media companies, as well as other fields. “Deep learning is great because it actually gives you an opportunity to do things that are more accurate faster,” said Aki Fujimura, chief executive of D2S. “In medical imaging, for example, you are really honing in on exactly which cells are cancerous. Using a deep learning engine, they can narrow it down to exactly which cells are bad. That’s a medical example. But you can imagine the same benefits that can be derived in semiconductor production.”

The IC industry is using machine learning for circuit simulation, hot spot detection and locating defects. “The applications are huge,” said Philippe Leray, litho process and patterning control group leader at Imec. “You can use it for lithography, etch and all the different steps. You can use it for machine maintenance.”

One of the challenges with machine learning in general is that you must feed the system with enough data. Metrology/inspection systems follow the same principle. You need to feed a system enough data to make it work. This can be a costly and difficult task. But if you don’t provide enough data, a problem can surface.

“You can do fantastic things and you can be fantastically wrong,” Leray said. “All of the difficulty is in training your data set. If it’s big enough, representative enough, and unbiased enough, then you can have a good answer. That’s a big challenge. You can fool yourself very easily just by providing a set of training that is inadequate or biased.”

If the data is inadequate, the outcomes are undesirable and could result in a false negative or a false positive. A false negative indicates that a chip doesn’t have a defect, when it actually does. A false positive is a test result that is incorrect.

Nonetheless, the technology is becoming a key part of metrology and inspection. “Machine learning and deep learning are rapidly being adopted, improving training and the integrity of output results. Networks are trained to follow process changes, filter out outliers, and false distributions,” said Ofer Adan, director of metrology and process control and distinguished member of the technical staff at Applied Materials. “Machine learning can use history and pre-defined information to improve performance. Deep learning has a huge advantage to extract information and attributes from images, which sometimes are too complicated for human or even standard machine methods to handle. However, there is no magic. If we know the physical model, we could get better results than DL/ML. So, if we know something on the physical model we can use it to help the deep learning model. One way to do it is to use it in the cost function which the deep learning is using for optimization. So the answer is we should use a combination of both.”

There is another way to look at the technology. “All metro/inspection vendors use it in various ways. The key question is does it provide any unique benefit to the fab? The important things to note is that machine learning is simply another enabling technology, which needs product integration and a deep level of customization to be useful to a fab,” said Kartik Venkataraman, director of product marketing at Nanometrics. “What is more common is for vendors to use a machine learning approach to extract the maximum information from their tools, which is why signal quantity and quality is still critical. Machine learning can only be as useful as the raw signals it is fed.”

Where is machine learning?
Today, machine learning is used by some but not all chipmakers. Some use it in various steps in the process flow. It depends on the company.

In the fab, some metrology and inspection systems use machine learning to help find defects. Supposedly, machine learning automates the process, but it doesn’t always work that way. At times, the system requires manual intervention by the operator to pull and examine the data.

But the bigger issue is that a tool from one vendor incorporates proprietary software, and is unable to communicate with systems from other companies. Some are working on integrating their systems to create an end-to-end feedback flow, but the technology is still in R&D, according to experts.

Ultimately, chipmakers would like an end-to-end intelligent feedback solution with tools from different vendors. Some are developing the technology, although this requires investment and resources.

In addition, the industry also would like tools with more advanced machine learning capabilities, particularly in wafer inspection. “Machine learning will become more important as tools become more powerful,” said Mark Smith, technical support engineer at KLA.

Wafer inspection involves two main tool technologies—e-beam and optical. Today, optical inspection is the workhorse tool in the fab. E-beam inspection is used in R&D and some parts of the fab. E-beam inspection has better resolutions than optical, but it is slower.

In a simple example, an inspection system inspects a wafer and the data is compared to a die or a database. Then, using a neural net, it spots the defects using pattern recognition techniques and automatically classifies them.

This technique, which has been around since the 1990s, is based on traditional methods. Companies continue to develop the traditional techniques, although they are also working on more advanced forms of machine learning.

“Many of KLA’s core detection technology is based on traditional image processing techniques, but we are doing work with machine learning as well,” KLA’s Smith said. “A couple of areas where machine learning is having a really big impact are in image classification and review sampling.”

There are some challenges to making all of this work. “Deep learning, the most advanced algorithms, is making headlines now. They rely on very large data sets to calibrate and train the models,” Smith said. “This isn’t always possible when searching for a new defect of interest (DOI), so we are taking a hybrid approach. There is still a lot of steam in some of the not-so-new approaches, if you add more information about how the inspection tools work and device information. For example, we commonly use design layout information as part of our algorithms.”

Others also are working on the technology. For example, in a recent paper, ASML and SK Hynix described a method of improving the accuracy of OPC in photomasks. This is accomplished using an e-beam tool and deep learning.

OPC makes use of tiny shapes, or sub-resolution assist features (SRAFs). The SRAFs are placed on a mask, which modifies the mask patterns to improve the printability on a wafer.

At each node, OPC runtimes and cost are increasing. “By adding a lot of CD and edge-placement gauges, we reduce the model error by about a third. And by further changing the model form from traditional models to deep learning models, we get another 18% gain in accuracy,” said Yu Cao, senior vice president at ASML.

Then, in another example, IBM and the University of Southern California (USC) recently presented a paper about e-beam inspection with machine learning. Traditionally, wafer inspection is conducted using die-to-die or die-to-database. With machine learning, though, IBM and USC passed the images through a trained model. This in turn would do the classification without the aid of a design or golden image. The trained model would be an inference engine, according to Ravi Bonam, member of the research staff at IBM. With this, researchers obtained an accuracy of 96.96% with 96.87% sensitivities.

Besides inspection, machine learning also is used in metrology. “It’s highly used and rapidly being adopted across the metrology and inspection space, including CD SEMs, OCD and even optical in-situ metrology such as optical emission spectroscopy or reflectometry,” Applied’s Adan said. “It can be used when you have a lot of information about a measure of interest but no direct measurement. Machine learning allows you find the correlation between a measure of interest and various parameters that might affect such a measure. It can also be used to predict tool performance, up time and other functions.”

Metrology itself is challenging. For example, planar transistors require five to six measurements. In finFETs, though, it requires 12 or more different CD measurements, such as the gate height, fin height, fin width and sidewall angle.

To handle the measurements, chipmakers require several metrology tool types, such as a critical-dimension scanning electron microscope (CD-SEM), optical CD (OCD) and others.

CD-SEMs, the workhorse metrology tool in the fab, take top-down measurements of the dimensions in a structure.

In a recent paper, Imec described a CD-SEM with machine learning. In effect, the technology can “de-noise” the CD-SEM. In the tool, Imec added another layer in the neural net, dubbed a generative adversarial network (GAN). By passing a noisy SEM image through the trained GAN, researchers obtained a noiseless model image.

Meanwhile, one OCD type, called scatteromentry, can measure the CDs, profiles and film thicknesses in finFETs. OCD is fast, but there are some drawbacks. OCD is a model-based technique. In many cases, the tools don’t measure the actual device. Instead, they measure surrogate or simple planar structures, which represent and behave like the actual device. The measurements between these structures and the actual devices are supposed to correlate.

OCD modeling also takes a long time, however. Then, in another approach, the OCD community has developed a model-less technology, which is a form of machine learning. It doesn’t replace traditional OCD. Instead, it is a complementary technique that leverages OCD.

“For some time, we have used detailed OCD models for device structures and targets, as well as our optical systems. But there are places where we have had gaps for unmodeled components; this is where machine learning is having a big impact. Machine learning has delivered improvements in metrology tool fleet matching and in precision. With the proper reference metrology, machine learning can also lead to improvements in time to results,” said Stilian Pandev, director of advanced algorithms in the Patterning division at KLA.

This could be a standalone computing system. Data is collected from OCD measurements and fed into the computer, which crunches the numbers and produces results.

In one example, Imec and Nova recently presented a paper on predicting the electrical performance in chips using OCD spectra and machine learning. “The OCD technique is based on rigorous coupled-wave analysis (RCWA), which is designated for periodic structures. Applying this technique for non-periodic structures, such as electrical structures, is a challenge,” said Sayantan Das, an R&D engineer at Imec.

“Machine learning algorithms can overcome these challenges, and becomes a complementary approach,” Das said. “Our work with Nova has shown that machine learning using OCD spectra can predict electrical performance with high R2 values. This enables good correlation to reference CD. It demonstrates good correlation to diffraction-based overlay and SEM-based overlay. It improves the correlation between measured and predicted resistance and capacitance compared to the OCD model.”

Meanwhile, in another example, GlobalFoundries and Nova recently used machine learning to predict the resistance of copper interconnects in chips. The companies used spectra collected from both OCD measurements and electrical test sites. “The predicted resistance correlation to the actual e-test value is improved in comparison with OCD results for multiple metal levels of various products. In the FEOL sector, we have demonstrated initial feasibility to predict the fin CD values from an inline measurement using machine learning,” said Padraig Timoney, a metrology engineer at GlobalFoundries, in a paper. Others from GlobalFoundries and Nova contributed to the work.

These and other results are impressive, at least in R&D. But are these results good and fast enough for the fab?

As before, machine learning for defect detection will continue to be used for some but not all apps. “You really have to understand and consider the quality of data you are feeding into these systems,” Coventor’s Fried said. “It’s the quality, the density and amount of data you are feeding into these systems that will determine the applicability.”

Clearly, machine learning is no longer a novelty. The technology has been around for a long time. But in many ways, it’s just scratching the surface.

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Scott Jewler says:

Thanks Mark! ML is also being deployed in the semiconductor backend for solder joint inspection in high density interconnects.

What’s clear is that leveraging ML for inspection is not purely a data science challenge. Successful deployments also depend on high-quality feature selection, training techniques, and labels.

Mark LaPedus says:

Hi Scott. Thanks. Is ML widely used in packaging?

Scott Jewler says:

Hi Mark,

There is a limited deployment of ML in the backend now primarily in AOI.

The key trend that SVXR sees is the realization by manufacturers and end customers that it is more cost-effective in the long run to collect rich data sets through continuous monitoring of back end processes than it is to deal with yield fall-out and field failures that can escape traditional process control techniques. Once you begin collecting rich data from continuous monitoring, ML is the natural way to extract meaningful information from this data.

Suresh Kumar K Regonda says:

hi Mark/Scott,
Any examples or paper that AI/ML applied in quality or supply chain for IOTs? Can you provide any reference s?

Nitin says:

the structures are well below 1 angstrom, which is equal to 0.1nm?
really ?

Applied_maths_guy says:


Your description in Fig. 1 is mathematically incorrect.
When you multiply a row vector with a matrix, you get a row vector back. But, in Fig. 1 you got a column vector as the output.
I wanted to point this out because matrix vector operations are at the core of DNNs, and I am saddened to see such a blatant mistake by the creator of Fig. 1.

Mark LaPedus says:

Hi Applied Maths, I suggest you contact Mythic on this. Thanks

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