tag: defects

AI Models Transform Defect Inspection And Review, But Can Fail To Scale
By Laura Peters - 09 Jun, 2026 - Comments: 0

Key Takeaways: AI plays a role in improving defect capture rate and distinguishing between yield-killing and nuisance defects. New developments in wafer edge inspection are proving essential to bonded wafer yields. 70% of AI initiatives stall after pilot implementation, but some pitfalls can be avoided. One of the brightest spots in AI use today is the industry’s ability t... » read more

The Smart Advantage: How Artificial Intelligence Is Transforming Inspection And Metrology In Semiconductor Manufacturing
By Charlie Zhu - 14 Apr, 2026 - Comments: 0

There is no doubt that the semiconductor industry is in an era of rapid and profound transformation, driven by an increasing demand for smaller, faster, and more powerful chips. As the speed of innovation continues to advance, so does the pressure on semiconductor manufacturers to detect and address defects and inconsistencies with near-perfect accuracy to keep pace with this demand. Manual ... » read more

Research Bits: Mar. 31
By Jesse Allen - 31 Mar, 2026 - Comments: 0

2D hard mask material Researchers from Penn State University and University of Chemistry and Technology Prague propose using the 2D material chromium oxychloride (CrOCl) as a hard mask, because its layered structure is resistant to plasma etching and enables it to be an effective mask at smaller thicknesses. “This 2D material is like lasagna. It’s a layer-by-layer structure,” said Zih... » read more

Beyond Optical: A New E-Beam Inspection For Advanced Chips
By Christophe Begue - 10 Feb, 2026 - Comments: 0

The semiconductor industry is defined by its relentless pursuit of smaller, faster, and more powerful chips. As we push into advanced 3D architectures like gate-all-around (GAA) transistors, a critical challenge emerges: finding the defects that kill yield. Many of these flaws are deeply buried within complex structures and impossible to see with traditional optical inspection. This creates ... » read more

Macro Defect Inspection For Mission-Critical Defense, Aerospace, And Advanced R&D Fabs
By Errol Akomer - 18 Dec, 2025 - Comments: 0

Some fabs build consumer chips that sit inside phones and laptops. Others build chips that must survive in orbit, under the Arctic ice, or deep beneath the Earth’s surface. Fabs serving defense, aerospace, national laboratories, and other advanced R&D programs operate under some of the most stringent requirements in the industry. For these facilities, yield is not the only concern. Sec... » read more

Stop The Drip-Drip-Drip Of Intermittent In-Line Wafer Defects And Increase Your Yields
By Errol Akomer - 23 Oct, 2025 - Comments: 0

Full-blown process excursions that affect every wafer are comparatively easy for fabs to detect and fix. However, “onesie-twosie,” lower-volume excursions can go unresolved for months or even years. Some process engineers call them "slow moving excursions.” And over time, those low-volume defects can add up to significant yield losses. Ignoring a problem Some intermittent process excurs... » read more

Metrology’s Growing Role In Reducing False Defects
By Gregory Haley - 14 Oct, 2025 - Comments: 0

When a good die fails test and gets scrapped, often no one notices, because false failures look identical to real ones. Yet across the industry, these phantom defects are quietly eroding yield, inflating test costs, and masking the true health of manufacturing processes. At advanced nodes and in heterogeneous packaging, where margins are already razor-thin, even minor variations in contact r... » read more

Hybrid Approach Emerges For Edge/Cloud Inspection Of Chips
By Anne Meixner - 14 Oct, 2025 - Comments: 0

An explosion in data from inspection images and metrology measurements is creating a confusing set of demands for chipmakers and their equipment vendors. On one hand they need the massive storage and compute resources of the cloud to utilize AI/ML-based models, but they also need the faster response time of the edge to make adjustments at the tool level. Balancing these requirements is a mas... » read more

How Guardbanding Of Inline Wafer Defects Can Improve Chip Reliability Insurance
By Errol Akomer - 21 Aug, 2025 - Comments: 0

Partially defective, marginal die can still be functional enough to pass final electrical test. Some of these “walking wounded” chips get past final testing, but in the customer's end product, under ongoing stress, they may fail. This is a particularly serious issue with automotive, medical and other customers who demand maximum long-term device reliability. The semiconductor industry ha... » read more

Advanced Electrical Test Capability For Better Defect Signature Detection In Advanced Package Development
By Jesse Ko - 12 Aug, 2025 - Comments: 0

As the semiconductor world excitingly explores the potential of new advanced package solutions for their intricate and novel designs, challenges arise from undetected defects caused by the complexity of the designs and the lack of accessibility to the interconnects for testing. This typically results in a long cycle time to achieve yield entitlement. Undetected defects at the development stage ... » read more

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