Scalable Photomask Optimization With Morphological Learning (SUNY Buffalo, VU, IBM)


A new technical paper, "MorphOPC: Advancing Mask Optimization with Multi-scale Hierarchical Morphological Learning," was published by researchers at University at Buffalo, Villanova University, and IBM T. J. Watson Research Center. Abstract "As feature sizes shrink to the nanometer scale, accurately transferring circuit patterns from photomasks to silicon wafers becomes increasingly chall... » read more

Exploring The Frontiers Of Lithography And Patterning: Highlights From SPIE Advanced Lithography + Patterning 2026


Leading‑edge system-on-chip (SoC) designs at deep submicron nodes are stretching lithography and patterning capabilities across the entire manufacturing flow. Extreme ultraviolet (EUV) lithography has become central to printing advanced features, using high‑power pulsed lasers to generate a plasma light source and reflective optics to project mask patterns onto the wafer. As error budgets t... » read more

Faster Mask Synthesis With GPUs


Design teams face rising pressure to deliver larger chips with higher transistor densities on tighter schedules using advanced node processing. The computing demands of modern applications, especially those making heavy use of AI, are extending pressure beyond design to every step of the development flow, including manufacturing, where photolithography and mask synthesis must keep pace. This po... » read more

Charting The Frontiers Of Photomask Technology And Extreme Ultraviolet Lithography


The enormous computing demands of AI and high-performance computing (HPC) applications are putting intense pressure on every aspect of chip development. Challenges arise during architecture, design, and verification, persist through the manufacturing process, and extend to post-silicon lifecycle management as chips are deployed in the field. Lithography, the fabrication step of shining light... » read more

Speeding Up Computational Lithography With The Power And Parallelism Of GPUs


There are so many challenges in producing modern semiconductor devices that it’s amazing for the industry to pull it off at all. From the underlying physics to fabrication processes to the development flow, there is no shortage of tough issues to address. Some of the biggest arise in lithography for deep submicron chips. A recent post outlined the major trends in lithography and summarized a ... » read more

Reduce Augmented Reality Device Time-to-Market by Bringing Manufacturing Impact to Optical Simulation


Disruptive AR systems will push the limits of optics: limits in design, limits in manufacturing, and limits in overall system integration. The trend of optical components being integrated into more complex miniaturized systems is impacting optical software. Optical design software has been around for decades to design, simulate, and analyze any optical component from lenses and mirrors to light... » read more

Multi-Beam Mask Writers Are A Game Changer


The eBeam Initiative’s 11th annual Luminaries survey in 2022 reported strong purchasing predictions for multi-beam mask writers, enabling both EUV and curvilinear photomask growth. A panel of experts debated remaining barriers to curvilinear photomask adoption during an event co-located with the SPIE Photomask Technology Conference in late September. Industry luminaries representing 44 compan... » read more

Scaling, Advanced Packaging, Or Both


Chipmakers are facing a growing number of challenges and tradeoffs at the leading edge, where the cost of process shrinks is already exorbitant and rising. While it's theoretically possible to scale digital logic to 10 angstroms (1nm) and below, the likelihood of a planar SoC being developed at that nodes appears increasingly unlikely. This is hardly shocking in an industry that has heard pr... » read more

The Right Project Is Key For Photomask Adoption Of Deep Learning


Deep learning (DL) has become an integral part of the success of many companies. There have been many papers and some reported successes in semiconductor manufacturing, yet only 22% of the luminaries participating in the 2021 eBeam Initiative Luminaries survey see DL as a competitive advantage for photomask making by next year, as shown in figure 1. Looking at that chart, the luminaries believe... » read more

Photomask Challenges At 3nm And Beyond


Experts at the Table: Semiconductor Engineering sat down to discuss optical and EUV photomasks issues, as well as the challenges facing the mask business, with Naoya Hayashi, research fellow at DNP; Peter Buck, director of MPC & mask defect management at Siemens Digital Industries Software; Bryan Kasprowicz, senior director of technical strategy at Hoya; and Aki Fujimura, CEO of D2S. What f... » read more

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