tag: Onto Innovation

Week In Review: Manufacturing, Test
By Gregory Haley - 01 Sep, 2023 - Comments: 0

Bosch completed its acquisition of TSI Semiconductors to expand its SiC chips business, reports Reuters. In April, Bosch announced plans to invest $1.5 billion in the Roseville, California, foundry to convert TSI’s manufacturing facilities into state-of-the-art processes, with the first SiC chips due out in 2026. Bosch CEO Stefan Hartung said the full expansion "depends on the support of the... » read more

Navigating the Metrology Maze For GAA FETs
By Gregory Haley - 08 Aug, 2023 - Comments: 0

The chip industry is pushing the boundaries of innovation with the evolution of finFETs to gate-all-around (GAA) nanosheet transistors at the 3nm node and beyond, but it also is adding significant new metrology challenges. GAA represents a significant advancement in transistor architecture, where the gate material fully encompasses the nanosheet channel. This approach allows for the vertical... » read more

SiC Growth For EVs Is Stressing Manufacturing
By Anne Meixner - 08 Aug, 2023 - Comments: 0

The electrification of vehicles is fueling demand for silicon carbide power ICs, but it also is creating challenges in finding and identifying defects in those chips. Coinciding with this is a growing awareness about just how immature SiC technology is and how much work still needs to be done — and how quickly that has to happen. Automakers are pushing heavily into electric vehicles, and t... » read more

3D NAND Needs 3D Metrology
By Nick Keller - 08 Aug, 2023 - Comments: 0

By Nick Keller and Andy Antonelli You’ve read the reports: the memory market is floundering as the semiconductor industry moves through another scarcity/surplus cycle. Be that as it may, innovation is happening as the industry continues to pursue increasingly higher three-dimensional stacks, with 3D NAND stacks taller than 200 layers entering production. However, there are challenges... » read more

Battling Over Shrinking Physical Margin In Chips
By Ed Sperling - 31 Jul, 2023 - Comments: 0

Smaller process nodes, coupled with a continual quest to add more features into designs, are forcing chipmakers and systems companies to choose which design and manufacturing groups have access to a shrinking pool of technology margin. In the past margin largely was split between the foundries, which imposed highly restrictive design rules (RDRs) to compensate for uncertainties in new proces... » read more

DAC/SEMICON West 2023 Roundup
By The SE Staff - 17 Jul, 2023 - Comments: 0

The interdependence of semiconductor devices and companies in manufacturing was a recurring theme at this year's SEMICON West, both in presentations and one-on-one discussions. Challenges range from sharing data securely across a highly integrated supply chain, particularly in light of heterogeneous integration, security concerns, and the increased use of AI, as well as concerns about the robus... » read more

Week In Review: Semiconductor Manufacturing, Test
By Gregory Haley - 14 Jul, 2023 - Comments: 0

SEMICON West returned in force this week, with a focus on AI and deep learning  in semiconductor manufacturing, security, heterogenous ICs, and the march toward a $1 trillion chip market. Lam Research President and CEO, Tim Archer, opened with the keynote presentation. Fig. 1: SEMICON West panel: AI’s influence on growth, China-U.S. trade war, and the importance of climate policy were... » read more

Addressing Copper Clad Laminate Processing Distortion Using Overlay Corrections
By Keith Best - 11 Jul, 2023 - Comments: 0

All great voyages must come to an end. Such is the case with our series on the challenges facing the manufacturing of advanced IC substrates (AICS), the glue holding the heterogeneous integration ship together. In our first blog, we examined how cumulative overlay drift from individual redistribution layers could significantly increase overall trace length, resulting in higher interconnect res... » read more

Using Advanced Analytics To Meet ESG Goals
By Mike McIntyre - 06 Jun, 2023 - Comments: 0

With the continued advancement of environmental, social and governance goals, corporations are increasingly focused on reducing their carbon footprints. To accomplish this, these companies are being asked to operate their businesses more efficiently than ever before, whether the matter is reducing waste, water usage or power consumption. This is true for the semiconductor industry as well. A... » read more

Challenges Grow For Creating Smaller Bumps For Flip Chips
By Anne Meixner - 18 May, 2023 - Comments: 0

New bump structures are being developed to enable higher interconnect densities in flip-chip packaging, but they are complex, expensive, and increasingly difficult to manufacture. For products with high pin counts, flip-chip [1] packages have long been a popular choice because they utilize the whole die area for interconnect. The technology has been in use since the 1970s, starting with IBM�... » read more

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