UMI: Extending Chiplet Interconnect Standards To Deal With The Memory Wall

By Ramin Farjadrad - 14 Oct, 2024 - Comments: 0

With the Open Compute Project (OCP) Summit upon us, it’s an appropriate time to talk about chiplet interconnect (in fact the 2024 OCP Summit has a whole day dedicated to the multi-die topic, on October 17). Of particular interest is the Bunch of Wires (BoW) interconnect specification that continues to evolve. At OCP there will be an update and working group looking at version 2.1 of BoW. (... » read more

Chip Industry Week In Review

By The SE Staff - 31 May, 2024 - Comments: 0

JEDEC and the Open Compute Project rolled out a new set of guidelines for standardizing chiplet characterization details, such as thermal properties, physical and mechanical requirements, and behavior specs. Those details have been a sticking point for commercial chiplets, because without them it's not possible to choose the best chiplet for a particular application or workload. The guidelines ... » read more

Everyone’s A System Designer With Heterogeneous Integration

By Ann Mutschler - 02 Oct, 2023 - Comments: 0

The move away from monolithic SoCs to heterogeneous chips and chiplets in a package is accelerating, setting in motion a broad shift in methodologies, collaborations, and design goals that are felt by engineers at every step of the flow, from design through manufacturing. Nearly every engineer is now working or touching some technology, process, or methodology that is new. And they are inter... » read more

Preparing For Commercial Chiplets

By Ed Sperling - 24 Aug, 2023 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss the path to commercialization of chiplets with Saif Alam, vice president of engineering at Movellus; Tony Mastroianni, advanced packaging solutions director at Siemens Digital Industries Software; Mark Kuemerle, vice president of technology at Marvell; and Craig Bishop, CTO at Deca Technologies. What follows are excerpts of tha... » read more

Chiplets: Deep Dive Into Designing, Manufacturing, And Testing

By The SE Staff - 07 Aug, 2023 - Comments: 0

Chiplets are a disruptive technology. They change the way chips are designed, manufactured, tested, packaged, as well as the underlying business relationships and fundamentals. But they also open the door to vast new opportunities for existing chipmakers and startups to create highly customized components and systems for specific use cases and market segments. This LEGO-like approach sounds ... » read more

Week in Review: Design, Low Power

By Jesse Allen - 03 Feb, 2023 - Comments: 0

Intel discontinued its Pathfinder for RISC-V program, according to numerous reports. The program provided a pre-silicon development environment to support IP selection and early-stage software development using Intel FPGA and simulator platforms. "Since Intel will not be providing any additional releases or bug fixes, we encourage you to promptly transition to third-party RISC-V software tools ... » read more

Standardizing Chiplet Interconnects

By John Koon - 23 May, 2022 - Comments: 0

The chip industry is making progress on standardizing the infrastructure for chiplets, setting the stage for faster and more predictable integration of different functions and features from different vendors. The ability to choose from a menu of small, highly specialized chips, and to mix and match them for specific applications and use cases, has been on the horizon for more than a decade. ... » read more

Industry Transforming In Ways Previously Unimaginable

By Brian Bailey - 30 Dec, 2021 - Comments: 0

Early in the year, everyone expected that the availability of COVID vaccines would signal the start of a return to normal, but that has certainly not been the case. Now the industry is taking a longer-term view about how to transform business, what is necessary for people to maintain their mental health, and how to create robust hybrid work environments for the future that do not discard the po... » read more

Challenges With Chiplets And Packaging

By Mark LaPedus - 15 Sep, 2021 - Comments: 0

Semiconductor Engineering sat down to discuss IC packaging technology trends, chiplets, shortages and other topics with William Chen, a fellow at ASE; Michael Kelly, vice president of advanced packaging development and integration at Amkor; Richard Otte, president and CEO of Promex, the parent company of QP Technologies; Michael Liu, senior director of global technical marketing at JCET; and Th... » read more

Week In Review: Auto, Security, Pervasive Computing

By Susan Rambo - 09 Apr, 2021 - Comments: 0

Pervasive computing — IoT, edge, cloud, data center, and back LG Electronics says it is closing its mobile business unit to focus on growth areas such as electric vehicle components, connected devices, smart homes, robotics, artificial intelligence and business-to-business solutions, as well as platforms and services. The company will continue to update some premium phones after it leaves th... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: Open Compute Project