The Single Greatest Opportunity For Open Source

By Brian Bailey - 25 Feb, 2021 - Comments: 7

Next week, I will be moderating a panel at the virtual DVCon on the subject of open-source verification. I thought it would be good to advertise the event on LinkedIn to see if anyone wanted to send me well-structured questions for the panelists. What happened surprised me a little because the discussions almost exclusively went to the need for open-source verification tools. In my opinion, the... » read more

Roaring ’20s For The Chip Industry

By Brian Bailey - 28 Jan, 2021 - Comments: 0

2020 was a good year for the semiconductor industry and the EDA industry that fuels it, but 2021 has the opportunity to be even better. New end application markets continue to open, and what were once seen as technical hurdles are leading to a multitude of innovative solutions, all of which need suitable tooling. No company can afford to invest everywhere, and so for EDA companies, their rel... » read more

ISA Ownership Matters: A Tale of Three ISAs

By Roddy Urquhart - 28 Jan, 2021 - Comments: 0

An instruction set architecture (ISA) is crucial to the development of processors and their software ecosystems. In the last half century, the majority of ISAs have been owned by single companies, whether product companies for their own chips/systems or processor IP companies who licensed their processors to chip developers. Does ISA ownership matter? Let’s consider three proprietary ISAs a... » read more

RISC-V Becoming Less Risky With The Right Verification

By Rob van Blommestein - 25 Jan, 2021 - Comments: 1

RISC-V continues to make headlines across the electronic design industry. You may have seen the recent news that the OpenHW Group is delivering their first RISC-V core, the CV32E40P. If you attended last month’s RISC-V Summit, perhaps you attended “CORE-V: Industrial Grade Open-Source RISC-V Cores” by Rick O’Connor, president of the OpenHW Group. In this session, Rick discussed how the ... » read more

Open Source Vs. Commercial RISC-V Licensing Models

By Roddy Urquhart - 22 Dec, 2020 - Comments: 0

Everybody is familiar with commercial licensing from traditional processor IP vendors such as Arm, Cadence, and Synopsys. But in discussing the RISC-V Open Instruction Set Architecture (ISA), there is widespread confusion of terminology with RISC-V often being described as “open source.” Some have even accused vendors of commercial RISC-V IP such as Codasip or Andes as not being in the spir... » read more

What Interested You In 2020

By Brian Bailey - 24 Nov, 2020 - Comments: 0

In business you are always told to follow the money, but for us it is more important to follow the readership. If we are not writing what you want to read, then we are missing the mark. I like to review the ones that have garnered the most attention, in part to see if that will influence what I write about for 2021, but also to find out where the industry is looking for the most help. As Sem... » read more

Know Your Code: Open Source Security Risks During Development

By Synopsys - 04 Nov, 2020 - Comments: 0

Exploits of software security vulnerabilities can result in loss of sensitive customer and company information, disruption of business operations, and costly litigation. Organizations are increasingly turning to open source software to save time and money, but few have sufficient visibility into, or control of, open source usage to head off potential open source risks. Read this white paper ... » read more

RISC-V: Will There Be Other Open-Source Cores?

By Ed Sperling - 06 Oct, 2020 - Comments: 5

Part 3: Semiconductor Engineering sat down to discuss the business and technology landscape for RISC-V with Zdenek Prikryl, CTO of Codasip; Helena Handschuh, a Rambus Security Technologies fellow; Louie De Luna, director of marketing at Aldec; Shubhodeep Roy Choudhury, CEO of Valtrix Systems; and Bipul Talukdar, North America director of applications engineering at SmartDV. What follows are exc... » read more

Open-Source Verification

By Brian Bailey - 30 Jul, 2020 - Comments: 1

Ask different people what open-source verification means and you will get a host of different answers. They range from the verification of open-source hardware, to providing an open-source verification infrastructure, to providing open-source stream generators or reference models, to open-source simulators and formal verification engines. Verification is about reducing risk. "Verification is... » read more

Challenges For A Post-Moore’s Law World

By Ed Sperling - 27 Jul, 2020 - Comments: 0

Semiconductor Engineering sat down to discuss challenges at the edge, the impact of open-source, and how to attract new talent, with Simon Segars, CEO of Arm; Joseph Sawicki, executive vice president of IC EDA at Mentor, a Siemens Business; Raik Brinkmann, CEO of OneSpin Solutions; Babak Taheri, CEO of Silvaco; John Kibarian, CEO of PDF Solutions; and Prakash Narain, CEO of Real Intent. The con... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?