RISC-V: Will There Be Other Open-Source Cores?

Experts at the Table: The current state of open-source tools, and what the RISC-V landscape will look like by 2025.

popularity

Part 3: Semiconductor Engineering sat down to discuss the business and technology landscape for RISC-V with Zdenek Prikryl, CTO of Codasip; Helena Handschuh, a Rambus Security Technologies fellow; Louie De Luna, director of marketing at Aldec; Shubhodeep Roy Choudhury, CEO of Valtrix Systems; and Bipul Talukdar, North America director of applications engineering at SmartDV. What follows are excerpt of that conversation. To view part 1, click here. Part 2 is here.

SE: Is there room for other open-source ISAs?

De Luna: No, and the momentum is actually toward a single ISA in any given SoC rather than multiple ISAs. On average today there are five ISAs in any given SoC. The industry wants that to be just one because it simplifies the hardware-software interfaces and the business contract between the hardware and software groups. A single ISA would simplify a lot of issues between different teams. Multiple ISAs also would mean multiple IC groups, and right now the RISC-V Foundation is doing a great job in terms of managing and promoting RISC-V. Their objectives are clear.

Prikryl: I do not think there’s any need for another open-source ISA. RISC-V is not the first attempt to have an open ISA, but it is the first that actually has succeeded. One of the reasons is there is a massive community behind it. It is not only about academia or hobbyists. Commercial companies are driving it, as well, and that’s really important. That didn’t happen in the past. So right now, it wouldn’t be wise to introduce more fragmentation. Instead of starting a new ISA we need to think how to further improve the current one, how to add new extensions and so on to make it competitive in all market segments.

Roy Choudhury: Inside of large chip companies there have been different ISAs, but they are quickly moving on to RISC-V. It’s pretty saturated. So if somebody wants to add a new ISA, it’s better if they join RISC-V.

Talukdar: One reason for that is the challenge of interpreting the spec. That’s the design intent, so what’s the final goal? It’s not like in a standard ISA flow, and once these things are well understood everyone can go and develop their own. You need to tell your customer this is proven IP and verification IP, and you need to produce information about benchmarks and show it has been used in this many products.

SE: How about open-source design tools? Are they sufficient? Will that change?

Prikryl: It’s good to have the open-source tools in general. It allows anyone to start doing designs — for example, students at universities or hobbyists. But having open-source tools doesn’t mean that there is no space for commercial tools that companies usually use. Having open-source tools is a great thing, and there are a lot of opportunities to use them. But it doesn’t mean they will push commercial tools away. In chip design you need reliable and fast support, bug fixes and other things. These usually come with commercially licensed tools. There is homework for the community to do regarding the open-source tools for synthesis, etc.

Roy Choudhury: There’s definitely a lot of space for open-source tools. But people do need a lot of support, which does not exist in open-source today. You need people to support it at a commercial level. We already have open-source tools being used by a number of RISC-V companies. But for them to become much more widespread, they need to be very well supported.

Handschuh: What RISC-V is trying to do is set up a framework and do the first step to allow people to play in it and build up an ecosystem. But then there’s sufficient room for everybody to play. There is sufficient room for vendors to come up with customized versions of tools that people are using for verification. It’s not like suddenly everything becomes open source and everything becomes free, and the whole world is participating for free. You have to make money as a company, and there’s sufficient room for vendors to participate and propose new solutions for how to address more customizable architectures. From our side, early on we chose RISC-V to implement in our Root of Trust product., and it was almost perfect. We only needed a couple more instructions, which we added to adapt it to the specific security use case we had.

De Luna: The industry is focusing on open-source IP, and it really starts from there. As for the verification tools, we’ll have to see what happens over time. But right now, the real focus is on the open-source IP.

Talukdar: Companies like Bluespec pick up open-source cores and productize those for customers, and they have been successful at it. There is a road map for that, but until that road map is followed by companies that are trying to monetize the open-source market, it’s not clear how successful it will be. But there definitely is an opportunity, and that was proven by Red Had in the Linux world.

SE: How do you envision this market will look in five years compared to where it is today?

Prikryl: Long story short, we will see RISC-V in more and more designs and products. In other words, the adoption of RISC-V will keep growing. We are starting to see RISC-V in new domains now, such as HPC, server and even automotive, which means more advanced and robust designs. It’s not just about the embedded domain anymore. One day, and it’s not that far away, we will see the first mobile phone that is RISC-V-based. I’m not saying that other processor architectures will disappear, but RISC-V definitely will grab a significant market share from them.

Handschuh: A few years from now we will see more results from an effort that’s starting today, which is to start looking at different verticals, different markets. What does it mean to optimize for a specific area? Maybe we’ll have more specifications that are adapted to those specific markets and will have more compliance programs in place so we will be able to certify things if we want to go there as a group. But there will be more stability and more appropriate solutions for specific vendors that want to go into into certain verticals.

Roy Choudhury: There will be lot more companies using the same processes, and I’m sure we’ll see a very powerful Linux-capable RISC-V CPU, as well. So I’m quite positive about it. Even though we are not aware of all the work going on in silos, we expect a lot more RISC-V designs and announcements in coming months and years.

De Luna: There are still a lot of milestones that we need to reach before RISC-V takes market share from Arm and x86. But in the future, after reaching a few of those milestones, we will have a single ISA for SoCs, and hopefully that will be based on RISC-V. It certainly would simplify many aspects of SoC development.

Talukdar: The tool set requirements will be defined. There is a lot of work and research being done on this. COVID-19 has slowed this down a bit, but the momentum is still huge. So in five years, RISC-V will probably equal the Arm infrastructure in terms of tool sets, running hardware compatibility with FPGAs and emulators. All these problems that we see today will be solved and equal to where Arm is today in terms of SoC development around the core. Once that happens, no one will be looking back.

Related
RISC-V: What’s Missing And Who’s Competing
RISC-V Gaining Traction
RISC-V Markets, Security And Growth Prospects
RISC-V Challenges And Opportunities
RISC-V’s Expanding Footprint
Open-Source Hardware Momentum Builds
Open-Source Verification



1 comments

Kevin Cameron says:

The future of computing is heterogeneous and parallel, serial processor ISAs are a boat-anchor in the past. RISC-V is the end of the line for an approach that ran out steam a decade ago, being cheaper is about all it has going for it (the functionality is otherwise available from (ARM, Tensilca, ARC, etc.).

An overlapping AI HW flow (neural networks) will probably kill it off. ISAs will be created dynamically within the tools as needed by processor requirements which are derived from software behavior (probably as part of LLVM).

ISAs are really just a target for compiler tools, not a machine description these days, the RISC-V ISA is extensible because fixed ISAs make no sense now. The complexity of the HW/SW flow is just a (long lasting) failure of computer science.

Leave a Reply


(Note: This name will be displayed publicly)