An Advanced Infrastructure To Enable Secure, Cloud-Aware Design And Processed Data EDA Tool Interoperability

By Si2 - 22 Jun, 2021 - Comments: 0

By Rajeev Jain, Kerim Kalafala, and Ramond Rodriguez Significant technology disruptions are on the horizon that will provide massive efficiency gains for EDA tool suppliers and semiconductor companies alike. These disruptions include the application of artificial intelligence and machine learning to enhance supplier tools and optimize user design flows and methodologies, and the ensuing migr... » read more

Open Standards For Verification?

By Ann Mutschler - 01 Jun, 2016 - Comments: 0

The increasing use of verification data for analyzing and testing complex designs is raising the stakes for more standardized or interoperable database formats. While interoperability between databases in chip design is not a new idea, it has a renewed sense of urgency. It takes more time and money to verify increasingly complex chips, and more of that data needs to be used earlier in the fl... » read more

One Flow To Rule Them All

By Brian Bailey - 12 Nov, 2015 - Comments: 0

The new mantra of shift left within EDA is nothing new and first made an appearance more than a decade ago. At that time there was a very large divide between logic synthesis and place and route. As wire delays became more important, timing closure became increasingly difficult with a logic synthesis flow that did not take that into account. The tools subsequently became tied much closer togeth... » read more

A Perspective On Open Process Specification

By Ted Paone - 27 Jan, 2014 - Comments: 2

It is the job of the Process Design Kit (PDK) engineers to deliver a high-quality PDK that properly represents the process requirements and constraints and supports the design flows used by their customers. The PDK engineer takes multiple inputs describing the process and the devices and circuitry in the process and generates the output in the form of OpenAccess technology libraries (techDB), d... » read more

The Week In Review: System-Level Design

By Ed Sperling - 27 Nov, 2013 - Comments: 0

Synopsys won a deal with Germany’s Hyperstone, which will use Synopsys verification tools for SoCs in industrial, automotive and medical applications. As SoCs used in industrial and “safety-critical” markets grow in complexity and move to more advanced process nodes, more advanced tools also are necessary. Si2 uncorked a new release of its OpenAccess scripting interface—oaScript Exte... » read more

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: OpenAccess

An Advanced Infrastructure To Enable Secure, Cloud-Aware Design And Processed Data EDA Tool Interoperability

Open Standards For Verification?

One Flow To Rule Them All

A Perspective On Open Process Specification

The Week In Review: System-Level Design