Merging Verification And Test

By Brian Bailey - 22 Apr, 2021 - Comments: 0

While the disciplines of functional verification and test serve different purposes, their histories were once closely intertwined. Recent safety and security monitoring requirements coupled with capabilities being embedded into devices is bringing them closer together again, but can they successfully cooperate to bring about improvements in both? Getting there may be difficult. Three phases ... » read more

Design Issues For Chips Over Longer Lifetimes

By Ed Sperling - 08 Mar, 2021 - Comments: 0

Semiconductor Engineering sat down to discuss the myriad challenges associated with chips used in complex systems over longer periods of time them with Jean-Marie Brunet, senior director for the Emulation Division at Siemens EDA; Frank Schirrmeister, senior group director for solution marketing at Cadence; Maurizio Griva, R&D Manager at Reply; and Laurent Maillet-Contoz, system and architec... » read more

Longer Chip Lifecycles Increase Security Threat

By Ed Sperling - 04 Feb, 2021 - Comments: 0

The longer chips and electronic systems remain in use, the more they will need to be refreshed with software and firmware updates. That creates a whole new level of security risks, ranging from over-the-air intercepts to compromised supply chains. These problems have been escalating as more devices are connected to the Internet and to each other, but it's particularly worrisome when it invol... » read more

Car Industry Changing Under The Hood

By Ann Mutschler - 07 Jan, 2021 - Comments: 0

After an initial burst of autonomous activity, the automotive ecosystem regrouped, re-evaluated its goals, and is now ready to begin deploying new technologies made possible by modern development approaches and forward-looking vehicle architectures. The pandemic hurt vehicle sales in 2020, but it also gave the OEMs a chance to catch their breath. Panic over announcements from other carmakers... » read more

Silicon Lifecycle Management

By Ed Sperling - 30 Nov, 2020 - Comments: 0

How do you track, measure and ensure reliability over the lifetime of a chip, regardless of how or where it is used? Steve Pateras, senior director of marketing for test products at Synopsys, drills down into the impact of hardware-software co-design, over-the-air updates, the expected lifetime of designs, and how the various monitors and sensors are used to track environmental, structural and ... » read more

Dealing With Security Holes In Chips

By Ed Sperling - 05 Nov, 2020 - Comments: 0

Semiconductor Engineering sat down to discuss security risks across multiple market segments with Helena Handschuh, security technologies fellow at Rambus; Mike Borza, principal security technologist for the Solutions Group at Synopsys; Steve Carlson, director of aerospace and defense solutions at Cadence; Alric Althoff, senior hardware security engineer at Tortuga Logic; and Joe Kiniry, princi... » read more

Software-Defined Vehicles

By Bryon Moyer - 03 Sep, 2020 - Comments: 1

Automobiles long ago stopped being purely mechanical systems. But as more components are electrified — and, in particular, as the drivetrain is electrified — cars are becoming software-defined vehicles. Some think of such cars as computers on wheels. But as these systems continue to evolve, adding in more assisted and semi-autonomous capabilities, that comparison is looking increasingly ... » read more

Maximizing Value Post-Moore’s Law

By Brian Bailey - 13 Jul, 2020 - Comments: 0

When Moore's Law was in full swing, almost every market segment considered moving to the next available node as a primary way to maximize value. But today, each major market segment is looking at different strategies that are more closely aligned with its individual needs. This diversity will end up causing both pain and opportunities in the supply chain. Chip developers must do more with a ... » read more

Automotive Gateway IP Enabling Scalable Automotive Platforms

By Ron DiGiuseppe - 01 Jul, 2020 - Comments: 1

As automakers introduce new electronic platforms, the system architectures are changing from distributed ECUs to integrated domain compute modules. This evolution, along with the increased number and types of sensors for ADAS systems, is having a big impact on the automotive Ethernet network and gateway function. Automotive Ethernet and gateways do more than support mobile connectivity, they en... » read more

Heterogeneous Design Creating Havoc With Firmware Versions

By Ed Sperling - 01 Apr, 2019 - Comments: 0

Adding different kinds of processing elements into chips is creating system-level incompatibilities because of sometimes necessary, but usually uncoordinated, firmware updates from multiple vendors. In the past, firmware typically was synchronized with other firmware and the chip was verified and debugged. But this becomes much more difficult when multiple heterogeneous processing elements a... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?