Uniquely Identifying PCBs, Subassemblies, And Packaging


Securing the semiconductor supply chain is becoming much more difficult as devices increasingly are disaggregated, a shift being forced on the industry due to the rising cost of scaling and the need for more customization and faster time to market. Individual component IDs are an important starting point for supply chain trust, but they are no longer sufficient. Those components will end up ... » read more

Rigid-Flex PCB Bending EM Analysis Using Clarity 3D Solver


Rigid-Flex PCBs have been used in many modern electronic devices (such as mobile phones, laptops, and wearables, among others), due to their form factor, light weight, and cost-effectiveness. Electromagnetic (EM) analysis of Rigid-Flex PCBs has always been a challenging task for many commercially available 3D numerical solver technologies (FEM and FDTD), due to the complexity in the 3D designs.... » read more

Demand Grows For Reducing PCB Defects


Board manufacturers are boosting their investment in inspection, test and analytics to meet the increasingly stringent demands for reliability in safety-critical sectors like automotive. This represents a significant shift from the past, where concerns about reliability primarily targeted the devices connected to printed circuit boards. But as SoCs become disaggregated into advanced packages... » read more

System-Level Packaging Tradeoffs


Leading-edge applications such as artificial intelligence, machine learning, automotive, and 5G, all require high bandwidth, higher performance, lower power and lower latency. They also need to do this for the same or less money. The solution may be disaggregating the SoC onto multiple die in a package, bringing memory closer to processing elements and delivering faster turnaround time. But ... » read more

Best Practices And Constraint Management Tools Speed RF Design For The IoT


By Jim Martens and David Zima The IoT has increased the demand for good radio frequency (RF) design practices from the mains, to wall outlet power, all the way to the antenna. With several IoT standards employed today, constraint management has become critical to ensuring that designs meet product performance and reliability. Even the simplest of IoT designs can benefit from constraint ma... » read more

Easier Bond Finger Solder Mask Openings


If you design wire bond packages, you’re familiar with the need for the bond fingers and rings on the package substrate layers to be exposed through the solder mask layer. If they aren’t, it becomes… rather difficult… to bond the wire to them, after all! We talked about general-purpose bounding shapes a few weeks ago in “A Boundless Bounty of Bounding Shapes”. Bond fingers have a... » read more

3nm: Blurring Lines Between SoCs, PCBs And Packages


Leading-edge chipmakers, foundries and EDA companies are pushing into 3nm and beyond, and they are encountering a long list of challenges that raise questions about whether the entire system needs to be shrunk onto a chip or into a package. For 7nm and 5nm, the problems are well understood. In fact, 5nm appears to be more of an evolution from 7nm than a major shift in direction. But at 3nm, ... » read more

Thermal Challenges In Advanced Packaging


CT Kao, product management director at Cadence, talks with Semiconductor Engineering about why packaging is so complicated, why power and heat vary with different use cases and over time, and why a realistic power map is essential particularly for AI chips, where some circuits are always on.   Interested in more Semiconductor Engineering videos? Sign-up for our YouTube channel here » read more

Week In Review: Design, Low Power


M&A Intel will acquire Barefoot Networks, a maker of programmable Ethernet switch silicon and the P4 networking programming language for data centers. Founded in 2013, the Santa Clara-based company has raised $155.4 million in funding. Terms of the deal were not disclosed, but Intel expects the acquisition to be final in the third quarter of this year. Tools & IP Mentor extended it... » read more

Waiting For Chiplet Interfaces


There aren't many success stories related to chiplets today for a very simple reason—there are few standard interfaces defined for how to connect them. In fact, the only way to use them is to control both sides of the interface with a proprietary interface and protocol. The one exception is the definition of HBM2, which enables large quantities of third-party DRAM to be connected to a logi... » read more

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