Chip Industry Technical Paper Roundup: May 20


New technical papers recently added to Semiconductor Engineering’s library: [table id=432 /] Find more semiconductor research papers here. » read more

Floorplanning Method For Reducing Thermally-Induced Structural Stress In Chiplet Packages (Penn State, Intel, ASU et al.)


A new technical paper titled "STAMP-2.5D: Structural and Thermal Aware Methodology for Placement in 2.5D Integration" was published by researchers at Pennsylvania State University, Intel, Arizona State University and University of Notre Dame. Abstract "Chiplet-based architectures and advanced packaging has emerged as transformative approaches in semiconductor design. While conventional ph... » read more

Research Bits: Apr. 29


Microchannels for two-phase cooling Researchers from the University of Tokyo propose cooling chips using microchannels built into the chips themselves. The method utilizes microfluidic channels to create a capillary structure through which coolant flows and a manifold distribution layer that controls the distribution of coolant. The structure enabled two-phase cooling through better managem... » read more

Chip Industry Technical Paper Roundup: Apr. 22


New technical papers recently added to Semiconductor Engineering’s library: [table id=421 /] Find more semiconductor research papers here. » read more

Chip Industry Week In Review


Don't have time to read this? Check out Semiconductor Engineering's Inside Chips podcast.  The U.S. Department of Commerce is investigating TSMC for potential export control violations involving Huawei chips, reports Reuters. The probe follows TechInsights' teardown of a Huawei AI accelerator chip last year. The foundry, meanwhile, maintains it has not shipped any chips to Huawei since 2020... » read more

2D Materials Roadmap: Current And Future Challenges, Solutions


A new technical paper titled "The 2D Materials Roadmap" was published by researchers at many institutions including Chinese Academy of Sciences, TU Denmark, Pennsylvania State University, University of Manchester, University of Cambridge et al. Abstract "Over the past two decades, 2D materials have rapidly evolved into a diverse and expanding family of material platforms. Many members of th... » read more

Chip Industry Week In Review


The 2024 IEEE International Electron Devices Meeting (IEDM) was held this week, prompting a number of announcements from: imec: Proposed a new CFET-based standard cell architecture for the A7 node containing two rows of CFETs with a shared signal routing wall in between, allowing standard cell heights to be reduced from 4 to 3.5T, compared to single-row CFETs. Integrated indium pho... » read more

Research Bits: Oct. 1


Rust-resistant coating for 2D semiconductors Researchers from Pennsylvania State University, National Yang Ming Chiao Tung University in Taiwan, Purdue University, Intel, and the Kurt J. Lesker Company developed a synthesis process to produce a rust-resistant coating with properties ideal for creating faster, more durable electronics. "One of the biggest issues that we see in 2D semiconduct... » read more

Chip Industry Technical Paper Roundup: July 30


New technical papers recently added to Semiconductor Engineering’s library, including a best paper award winner at ISCA. [table id=246 /] More ReadingTechnical Paper Library home » read more

Battery Electronification: Intracell Actuation And Thermal Management (Penn State, EC Power)


A technical paper titled “Battery electronification: intracell actuation and thermal management” was published by researchers at Pennsylvania State University and EC Power. Abstract: "Electrochemical batteries – essential to vehicle electrification and renewable energy storage – have ever-present reaction interfaces that require compromise among power, energy, lifetime, and safety. He... » read more

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