Chip Industry Technical Paper Roundup: Jan 2


New technical papers added to Semiconductor Engineering’s library this week. [table id=180 /] More ReadingTechnical Paper Library home » read more

FeFET Memory Encrypted Inside The Storage Array


A new technical paper titled "Embedding security into ferroelectric FET array via in situ memory operation" was published by researchers at Pennsylvania State University, University of Notre Dame, Fraunhofer IPMS, National University of Singapore, and North Dakota State University. Abstract "Non-volatile memories (NVMs) have the potential to reshape next-generation memory systems because of... » read more

Chip Industry’s Technical Paper Roundup: Dec 11


New technical papers added to Semiconductor Engineering’s library this week. [table id=174 /] More ReadingTechnical Paper Library home » read more

Tapping 2D van der Waals Ferroelectrics For Use In Next-Generation Electronics


A technical paper titled “Domain-dependent strain and stacking in two-dimensional van der Waals ferroelectrics” was published by researchers at Rice University, Massachusetts Institute of Technology, University of Texas at Arlington, Texas A&M University, and Pennsylvania State University. Abstract: "Van der Waals (vdW) ferroelectrics have attracted significant attention for their pot... » read more

Research Bits: Aug. 7


Stretchy semiconductors Researchers from Pennsylvania State University, University of Houston, Southeast University, and Northwestern University are working towards fully flexible electronics. “Such technology requires stretchy elastic semiconductors, the core material needed to enable integrated circuits that are critical to the technology enabling our computers, phones and so much more,... » read more

Week In Review: Design, Low Power


Cadence will acquire Rambus' SerDes and memory interface PHY IP business. Rambus will retain its digital IP business, including memory and interface controllers and security IP. “With this transaction, we will increase our focus on market-leading digital IP and chips and expand our roadmap of novel memory solutions to support the continued evolution of the data center and AI,” said Sean Fan... » read more

Chip Industry’s Technical Paper Roundup: Apr. 25


New technical papers recently added to Semiconductor Engineering’s library: [table id=94 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us ... » read more

Spiking Neural Networks: Hardware & Algorithm Developments


A new technical paper titled "Exploring Neuromorphic Computing Based on Spiking Neural Networks: Algorithms to Hardware" was published by researchers at Purdue University, Pennsylvania State University, and Yale University. Excerpt from Abstract: "In this article, we outline several strides that neuromorphic computing based on spiking neural networks (SNNs) has taken over the recent past, a... » read more

Research Bits: Jan. 24


Transistor-free compute-in-memory Researchers from the University of Pennsylvania, Sandia National Laboratories, and Brookhaven National Laboratory propose a transistor-free compute-in-memory (CIM) architecture to overcome memory bottlenecks and reduce power consumption in AI workloads. "Even when used in a compute-in-memory architecture, transistors compromise the access time of data," sai... » read more

Research Bits: Jan. 9


Making stretchy semiconductors Researchers from Pennsylvania State University, University of Houston, Purdue University, and Texas Heart Institute developed a new method to make soft, stretchable transistors easier and cheaper to manufacture. The lateral phase separation induced micromesh (LPSM) process involves mixing a semiconductor and an elastomer and spin coating the liquid mixture pre... » read more

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