tag: Pennsylvania State University

Research Bits: Feb. 27
By Jesse Allen - 27 Feb, 2024 - Comments: 0

Phonon-magnon reservoir Researchers from TU Dortmund, Loughborough University, V. E. Lashkaryov Institute of Semiconductor Physics, and University of Nottingham were inspired by the human eye to propose an on-chip phonon-magnon reservoir for neuromorphic computing. In reservoir computing, input signals are mapped into a multidimensional space, which is not trained and only expedites recogni... » read more

Chip Industry Technical Paper Roundup: Jan 2
By Linda Christensen - 02 Jan, 2024 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week. [table id=180 /] More ReadingTechnical Paper Library home » read more

FeFET Memory Encrypted Inside The Storage Array
By Technical Paper Link - 20 Dec, 2023 - Comments: 0

A new technical paper titled "Embedding security into ferroelectric FET array via in situ memory operation" was published by researchers at Pennsylvania State University, University of Notre Dame, Fraunhofer IPMS, National University of Singapore, and North Dakota State University. Abstract "Non-volatile memories (NVMs) have the potential to reshape next-generation memory systems because of... » read more

Chip Industry’s Technical Paper Roundup: Dec 11
By Liz Allan - 11 Dec, 2023 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week. [table id=174 /] More ReadingTechnical Paper Library home » read more

Tapping 2D van der Waals Ferroelectrics For Use In Next-Generation Electronics
By Technical Paper Link - 05 Dec, 2023 - Comments: 0

A technical paper titled “Domain-dependent strain and stacking in two-dimensional van der Waals ferroelectrics” was published by researchers at Rice University, Massachusetts Institute of Technology, University of Texas at Arlington, Texas A&M University, and Pennsylvania State University. Abstract: "Van der Waals (vdW) ferroelectrics have attracted significant attention for their pot... » read more

Research Bits: Aug. 7
By Jesse Allen - 07 Aug, 2023 - Comments: 0

Stretchy semiconductors Researchers from Pennsylvania State University, University of Houston, Southeast University, and Northwestern University are working towards fully flexible electronics. “Such technology requires stretchy elastic semiconductors, the core material needed to enable integrated circuits that are critical to the technology enabling our computers, phones and so much more,... » read more

Week In Review: Design, Low Power
By Jesse Allen - 21 Jul, 2023 - Comments: 0

Cadence will acquire Rambus' SerDes and memory interface PHY IP business. Rambus will retain its digital IP business, including memory and interface controllers and security IP. “With this transaction, we will increase our focus on market-leading digital IP and chips and expand our roadmap of novel memory solutions to support the continued evolution of the data center and AI,” said Sean Fan... » read more

Chip Industry’s Technical Paper Roundup: Apr. 25
By Linda Christensen - 25 Apr, 2023 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=94 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us ... » read more

Spiking Neural Networks: Hardware & Algorithm Developments
By Technical Paper Link - 18 Apr, 2023 - Comments: 0

A new technical paper titled "Exploring Neuromorphic Computing Based on Spiking Neural Networks: Algorithms to Hardware" was published by researchers at Purdue University, Pennsylvania State University, and Yale University. Excerpt from Abstract: "In this article, we outline several strides that neuromorphic computing based on spiking neural networks (SNNs) has taken over the recent past, a... » read more

Research Bits: Jan. 24
By Jesse Allen - 24 Jan, 2023 - Comments: 0

Transistor-free compute-in-memory Researchers from the University of Pennsylvania, Sandia National Laboratories, and Brookhaven National Laboratory propose a transistor-free compute-in-memory (CIM) architecture to overcome memory bottlenecks and reduce power consumption in AI workloads. "Even when used in a compute-in-memory architecture, transistors compromise the access time of data," sai... » read more

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