tag: physical verification

Mastering 3D-IC Verification Complexity
By Matt Grange - 11 Jun, 2026 - Comments: 0

The semiconductor industry's transition from traditional 2D integrated circuits to 2.5D and 3D-IC configurations represents more than an incremental advancement. This architectural shift, driven by the need to push beyond conventional scaling limitations, introduces a cascade of verification challenges that legacy methodologies struggle to address. As designs incorporate multiple stacked dies, ... » read more

A Comprehensive Approach To 3D-IC Physical Verification
By Siemens EDA - 05 Jun, 2026 - Comments: 0

3D integrated circuits (3D ICs) are reshaping semiconductor development. While these architectures deliver significant performance, power and integration gains, they introduce new challenges in verification—across electrical, thermal and mechanical domains. Siemens Calibre offers a comprehensive platform for 3D IC physical verification, linking DRC, LVS, advanced thermal simulation, mechanica... » read more

From Billions Of Violations To Actionable Insights: Calibre Vision AI
By Siemens EDA - 29 May, 2026 - Comments: 0

As advanced node SoCs increase in size and complexity, early full-chip DRC runs frequently produce hundreds of millions to billions of violations. This overwhelming scale leads to new challenges—not just in running checks, but in comprehending results, setting priorities, and coordinating closure across teams. Introduced in 2025, Calibre Vision AI enabled instance-complete, AI-guided triage a... » read more

Harnessing Artificial Intelligence For Trusted IC Signoff
By Carey Robertson - 14 May, 2026 - Comments: 0

After years of behind-the-scenes work, artificial intelligence (AI) is now embedded throughout the technology world—from space exploration to everyday apps on our smartphones. There is a circular feedback loop in which we design more powerful computer chips to train AI models and use them; and then use those AI models to design even more powerful chips. The use of AI in the software used for ... » read more

Across The Vast Reaches Of The 3D Stack: Mastering ESD Verification In Advanced Semiconductor Design
By Keerthana Chelur Hithesh - 05 Mar, 2026 - Comments: 0

Introduction: The epic challenge In the vast reaches of the semiconductor cosmos, a silent menace lurks—one that can obliterate years of design work in a fraction of a nanosecond. Electrostatic discharge (ESD) verification stands as the guardian against this invisible threat, a critical discipline that separates the triumphant chip designs from the smoldering wreckage of failed silicon dream... » read more

Reap Rewards With Shift-Left Pattern Matching For Custom And AMS Designs
By John Muirhead - 24 Apr, 2025 - Comments: 0

To keep up with the growing complexities of IC design, major semiconductor companies are adopting shift-left strategies. For verification, this means pulling much of the work into the physical design stage. By moving critical checks earlier in the design cycle, you can identify and resolve issues before they escalate, streamlining the overall development process. The Calibre tools have been ... » read more

Boost High-Performance IC Design Flows With Early Interactive Symmetry Checking
By Sara Khalaf - 17 Oct, 2024 - Comments: 0

In the realm of high-performance IC (integrated circuit) design, symmetry is not just an aesthetic preference—it’s a critical factor for ensuring proper device functionality, especially in analog and RF designs. Achieving symmetry early in the design process helps to ensure consistent electrical behavior, which is essential for meeting performance goals and maintaining device reliability. H... » read more

Here At Last! Automated Verification Of Heterogeneous 2D/3D Package Connectivity
By Michael Walsh - 25 Jul, 2024 - Comments: 0

By Michael Walsh and Jin Hou with Todd Burkholder The heterogeneous integration of multiple ICs in a single package along with high-performance, high-bandwidth memory is critical for many high-performance computing applications. After everything has been heterogeneously integrated and packaged, such designs feature complex connectivity with many hundreds of thousands of connections, making i... » read more

The 3D-IC Multiphysics Challenge Dictates A Shift-Left Strategy
By John Ferguson - 25 Apr, 2024 - Comments: 0

As the industry marches forward in a 3D-IC centric design approach (figure 1), we are facing a new problem. Sometimes referred to as “electro-thermal” or “electro-thermo-mechanical,” it really is the confluence of multiple forms of physics exerting impacts on both the physical manufacture and structure of these multi-die designs and their electrical behavior. Fig. 1: Illustration... » read more

How To Get Accurate Inductance Extraction For Superconductor ICs
By Hossam Sarhan - 11 Apr, 2024 - Comments: 0

By Hossam Sarhan and Dusan Petranovic Supporting the high performance and reliability needed for artificial intelligence (AI), data centers and cloud computing requires powerful and efficient integrated circuits (ICs). More semiconductor companies are considering superconductor ICs for their unique properties that allow ultrafast processing of digital information. These properties include fa... » read more

← Older posts

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2026 SMG   |  Terms of Service  |  Privacy Policy