Development Of Planarizing Spin-On Carbon Materials For High-Temperature Processes


Multilayer lithography is used for advanced semiconductor processes to pattern complex structures. As more and more procedures incorporate a high-temperature process, such as chemical vapor deposition (CVD), the need for thermally stable materials increases. For certain applications, a spin-on carbon (SOC) layer under the CVD layer is required to survive through a high-temperature process. ... » read more

Super Planarizing Material For Trench And Via Arrays


As device design scales and becomes more complex, fine control of patterning and transfer steps is integral. Planarization of deep trenches and via arrays has always been a challenge. Aspect ratios continue to increase while critical dimensions shrink, and typical trench fill schemes are no longer able to meet the fill and planarization requirements. Traditional design of spin-on carbon (SOC) m... » read more

Planarization Challenges At 7nm And Beyond


Dan Sullivan, executive director of semiconductor technology at Brewer Science, digs into the challenges of planarizing a thin film on a wafer for etch and optical control. The problem becomes more difficult at advanced nodes because the films are thinner. https://youtu.be/iNA6EGpoYZU     _________________________________ See more tech talk videos here   » read more

The Problem With Spin-On Carbon Materials


In an integrated circuit manufacturing process, spin-on-carbon (SOC) materials constitute an important layer for the multilayer process to achieve smaller feature size. The SOC layer responds to the photolithography, pattern transformation, substrate planarization, and a variety of other critical processes. A key challenge in selecting a suitable material is that some processes require a hig... » read more