Achieving Consistent RTL Power Accuracy


Are you struggling to accurately estimate RTL power consumption early in your design process? RTL power estimation can be inaccurate due to the complexity of the designs, the various power domains, and the use of multiple tools in the design process. Designers can make effective power-performance-area tradeoffs early by using a holistic methodology that includes both architectural and micro-arc... » read more

Thermal Management Implications For Heterogeneous Integrated Packaging


As the semiconductor industry reaches lower process nodes, silicon designers struggle to have Moore's Law produce the results achieved in earlier generations. Increasing the die size in a monolithic system on chip (SoC) designs is no longer economically viable. The breakdown of monolithic SoCs into specialized chips, referred to as chiplets, presents significant benefits in terms of cost, yield... » read more

High Thermal Die-Attach Paste Development For Analog Circuits


In recent years, various die attach (DA) materials have been developed to cope with the higher power dissipation requirements of semiconductor devices. DA materials based on metals such as solder or sintered silver (Ag) are used for very high heat generating power devices. While they show outstanding thermal performance, the mechanical properties of these materials are less than ideal. This lim... » read more

Ultra-Low-Power SAR ADC in 22 nm FD-SOI Technology Using Body-Biasing


Today’s sensor applications show a rising demand on miniaturized autonomous sensors nodes with extreme requirements on power dissipation. One core functionality of these sensor nodes is the conversion of analog sensor signals to digital data for post processing and data communication. In this work a 11-bit Successive Approximation Register (SAR) ADC with minimized power dissipation is develop... » read more

Power/Performance Bits: Dec. 8


Reducing transistor switching power One of the great challenges in electronics has been to reduce power consumption during transistor switching operation. However, engineers at University of California, Santa Barbara, and Rice University demonstrated a new transistor that switches at only 0.1 volts and reduces power dissipation by over 90% compared to state-of-the-art MOSFETs. "The steepn... » read more

As Nodes Advance, So Must Power Analysis


By Chetandeep Singh and Ravi Tangirala Smaller geometry nodes offer cost and performance advantages that encourage their adoption. Yet they present a new set of challenges for IC manufacturers: Though transistors are smaller, they leak more current. This is an important issue as the demand for high-performance, battery-operated, system-on-chips (SoC) in communication and computing shifts th... » read more